參數(shù)資料
型號(hào): SG6858DZ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 穩(wěn)壓器
英文描述: Low-Cost, Green-Mode PWM Controller for Flyback Converters
中文描述: SWITCHING CONTROLLER, 75 kHz SWITCHING FREQ-MAX, PDIP8
封裝: GREEN, MS-001BA, DIP-8
文件頁(yè)數(shù): 9/13頁(yè)
文件大?。?/td> 512K
代理商: SG6858DZ
Product Specification
Low-Cost, Green-Mode PWM Controller for Flyback Converters
Under-Voltage Lockout (UVLO)
SG6858
System General Corp.
Version 1.2.1 (IAO33.0045.B2)
- 9 -
www.sg.com.tw www.fairchildsemi.com
September 25, 2007
The turn-on and turn-off thresholds of the SG6858 are
fixed internally at 16.5V/11.5V. During start-up, the
hold-up capacitor must be charged to 16.5V through the
start-up resistor to enable SG6858. The hold-up capacitor
continues to supply V
DD
until power can be delivered
from the auxiliary winding of the main transformer. V
DD
must not drop below 11.5V during this start-up process.
This UVLO hysteresis window ensures that hold-up
capacitor is adequate to supply V
DD
during start-up.
V
DD
Over-Voltage Protection
V
DD
over-voltage protection has been built in to prevent
damage due to over-voltage conditions. When the voltage
V
DD
exceeds the internal threshold due to abnormal
conditions,
PWM output is turned off until the V
DD
voltage drops below the UVLO, then starts up again.
Over-voltage
conditions
open-feedback loops.
are
usually
caused
by
Gate Output
The BiCMOS output stage is a fast totem pole gate driver.
Cross conduction has been avoided to minimize heat
dissipation, increase efficiency, and enhance reliability.
The output driver is clamped by an internal 17V Zener
diode to protect power MOSFET transistors against
undesired over-voltage gate signals.
Built-in Slope Compensation
The sensed voltage across the current sense resistor is
used for current-mode control and pulse-by-pulse current
limiting. Built-in slope compensation improves stability
and
prevents
sub-harmonic
peak-current mode control. The SG6858 has a
synchronized, positively-sloped ramp built-in at each
switching cycle. The slope of the ramp is:
oscillations
due
to
.)
(max
Duty
Duty
36
.
×
(2)
Noise Immunity
Noise from the current sense or the control signal can
cause significant pulse width jitter, particularly in
continuous-conduction mode. While slope compensation
helps alleviate these problems, further precautions should
still be taken. Good placement and layout practices should
be followed. Avoiding long PCB traces and component
leads, locating compensation and filter components near
the SG6858, and increasing the power MOS gate
resistance improves performance.
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