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參數(shù)資料
| 型號(hào)： | SG6840 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | HIGH INTEGRATED PWM CONTROLLER |
| 中文描述： | 高集成PWM控制器 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 384K |
| 代理商： | SG6840 |
H
Product Specification
SG6840
2002 System General Corporation Ver1.0 http://www.sg.com.tw
Start-up Current
Typical start-up current is only 30uA
This ultra low start-up
current allows users to use a high resistance, and low-
wattage, start-up resistor to supply the start-up power re-
quired by SG6840. Take a wide input-range (100V
AC
-
~240V
AC
) of AC-to-DC power adapter as an example, an 1.5
M
, 0.25W, start-up resistor and a 10uF/25V VDD hold-up
Operating Current
Operating current has been reduced to 3mA. The low oper-
ating current enables a better efficiency and reduces the
OPERATION DESCRIPTION
Green Mode Operation
The patented green-mode function provides an off-time
modulation to reduce the switching frequency in the light load
and no load conditions. The feedback voltage, which is de-
rived from the voltage feedback loop, is taken as the refer-
ence. Once the feedback voltage is lower than the threshold
voltage, switching frequency will linearly decrease until the
minimum green mode frequency around 10kHz (R
i
=26k
).
We can find that all of the losses are in proportional to the
switching frequency, such as the switching loss of the tran-
sistor, the core loss of the transformer and inductors, and the
power loss of the snubber, etc. The off-time modulation in the
PWM controller can reduce the power consumption of the
power supply in light load and no load conditions. In normal
load and high load conditions, the PWM frequency is at its
maximum frequency around 65kHz (R
i
=26k
) and not af-
fected by the off-time modulation.
Oscillator Operation
An external resistor R
i
determines the PWM oscillation fre-
quency. A 26k
resistor R
i
creates a 50uA constant current I
i
and generates 65kHz switching frequency.
I
i
(mA) = 1.3V / R
i
(k
);
)
(
kHz
)
(k
R
1690
PWM
f
=
- 7 -
(1)
Current sensing and PWM current limiting
SG6840 consists of two feedback loops: voltage loop and
current loop, to control the load regulation. SG6840’s cur-
rent sense input is designed for the current-mode control. A
current-to-voltage conversion is done externally through a
current-sense resistor Rs. Under normal operation, the FB
voltage V
FB
controls the peak voltage across the sense
resistor Rs, hence the PWM duty cycle, as follows:
Ipk = (V
FB
– 1.4) / 5Rs;
where
V
FB
is the voltage on pin FB
When the DC output voltage of secondary side decreases due
to heavy load conditions, the FB voltage V
FB
will increase such
that the PWM duty cycle increases to regulate the output
voltage of secondary side back to its normal voltage. The
inverting input to SG6840’s current-sense comparator is in-
ternally clamped to a variable voltage around 0.85V (note: see
Constant Output Power Limit section). The current limiting
occurs if the voltage of SENSE pin reaches this 0.85V thresh-
old value, such as Ipk (max) = 0.85V/Rs. The value of sense
resistor Rs decides the maximum power limit. Larger Rs,
whose Ipk is smaller, results in a smaller power limit
Leading Edge Blanking
Each time when the power MOSFET is switched on, a leading
spike is generated due to parasitic capacitance. To avoid
premature termination of the switching pulse, this leading
edge spike is blanked out with a time constant 270 nsec.
During this time period, the current-limit comparator is dis-
abled and cannot switch off the gate drive regardless how big
the SENSE voltage is.
Under-voltage lockout (UVLO)
The UVLO Under-Voltage Lockout (UVLO) function ensures
the supply voltage V
DD
for SG6840 is adequate to fully function
before enabling the output stage. The turn-on and turn-off
threshold voltages are fixed internally at 16V/10V. The hys-
teresis voltage between turn-on and turn-off prevents V
DD
from
being unstable during power on/off sequencing. Start-up
current is typically 30uA for efficient bootstrapping from the
rectified input for an off-line converter. During the normal
operation, V
DD
is developed from an auxiliary winding of the
transformer. At the moment of start-up, V
DD
hold-up capacitor
C
IN
must be charged up to 16V through the start-up resistor R
IN
before enabling the output switch. With an ultra small start-up
current of 30uA, R
IN
can be as large as 1.5 M
and still be able
to charge up the hold-up capacitor C
IN
even when V
AC
=
90Vrms. Power dissipation of this large resistance R
IN
would
then be less than 70mW (0.07W) even under high line (V
AC
=
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| SG6841 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High-integrated Green-mode PWM Controller |
| SG6841D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High-integrated Green-mode PWM Controller |
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| SG6841DZ3 | 功能描述:電壓模式 PWM 控制器 SINGLE STAGE PFC CONTROLLER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| SG6841S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High-integrated Green-mode PWM Controller |
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