參數(shù)資料
型號: SG6741
廠商: Fairchild Semiconductor Corporation
英文描述: Highly-Integrated Green-Mode PWM Controller
中文描述: 高度集成的綠色模式PWM控制器
文件頁數(shù): 10/13頁
文件大?。?/td> 623K
代理商: SG6741
Product specification
Highly-Integrated Green-Mode PWM Controller
Built-in Slope Compensation
SG6741
System General Corp.
Version 1.2.1 (IAO33.0047.B2)
- 10 -
www.sg.com.tw www.fairchildsemi.com
September 19, 2007
The sensed voltage across the current-sense resistor is
used for peak-current-mode control and pulse-by-pulse
current limiting. Built-in slope compensation improves
stability and prevents sub-harmonic oscillation. SG6741
inserts a synchronized positive-going ramp at every
switching cycle.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor R
S
,
reaches the threshold voltage around 0.9V, the output
GATE drive is turned off after a small delay, t
PD
. This
delay introduces an additional current, proportional to t
PD
V
IN
/ L
P
. The delay is nearly constant, regardless of the
input voltage V
IN.
Higher input voltage results in a larger
additional current and the output power limit is also higher
than that under low input line voltage. To compensate this
variation for wide AC input range, a sawtooth
power-limiter is designed to solve the unequal
power-limit problem. The power limiter is designed as a
positive ramp signal and is fed to the inverting input of the
OCP comparator. This results in a lower current limit at
high-line inputs than at low-line inputs.
V
DD
Over-Voltage Protection
V
DD
over-voltage protection has been built in to prevent
damage due to abnormal conditions. Once the V
DD
voltage
is over the V
DD
over-voltage protection voltage (V
DD-OVP
),
and lasts for t
D-VDDOVP
, the PWM pulses is disabled until
the V
DD
voltage drops below the UVLO, then starts up
again. Over-voltage conditions are usually caused by open
feedback loops.
Limited Power Control
The FB voltage increases every time the output of the
power supply is shorted or overloaded. If the FB voltage
remains higher than a built-in threshold for longer than
t
D-OLP
, PWM output is turned off. As PWM output is
turned off, the supply voltage V
DD
begins decreasing.
When V
DD
goes below the turn-off threshold (eg, 10.5V)
the controller totally shuts down. V
DD
is charged up to the
turn-on threshold voltage of 16V through the start-up
resistor until PWM output is restarted. This protection is
activated as long as the overloading condition persists.
This prevents the power supply from overheating.
Noise Immunity
Noise on the current sense or control signal may cause
significant pulse width jitter, particularly in the
continuous-conduction mode. Slope compensation helps
alleviate this problem. Good placement and layout
practices should be followed. Avoiding long PCB traces
and component leads, locating compensation and filter
components near to the SG6741, and increasing the power
MO gate resistance improves performance.
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