
SG1731/SG2731/SG3731
Rev 1.3a
Copyright
1999
11861
Western
Avenue
∞
Garden
Grove,
CA
92841
3
(714) 898-8121
∞
FAX: (714) 893-2570
ELECTRICAL CHARACTERISTICS (continued)
Test Conditions
Units
Min.
Typ. Max.
SHUTDOWN Section
Parameter
SG1731/2731/3731
HIGH Output Voltage
LOW Output Voltage
Driver Risetime
Driver Falltime
APPLICATION INFORMATION
SUPPLY VOLTAGE
The SG1731 requires a supply voltage for the control circuitry (V
S)
and for the power output drivers (V
O). Each supply may be either
balanced positive and negative with respect to ground, or single-
ended. The only restrictions are:
1. The voltage between +V
S and -VS must be at least 7.0V; but
no more than 44V.
2. The voltage between +V
O and -VO must be at least 5.0V; but
no more than 44V.
3. +V
O must be at least 5V more positive than -VS.
This
eliminates the combination of a single-ended positive control
supply with a single-ended negative driver supply.
SUBSTRATE CONNECTION
The substrate connection (Pin 10) must always be connected to
either -V
S or -VO, whichever is more negative. The substrate must
also be well bypassed to ground with a high quality capacitor.
OSCILLATOR
The triangle oscillator consists of two voltage comparators, a set/
reset flip-flop, a bi-directional 500
A current source, and an
external timing capacitor C
T. A positive reference voltage (2V
+
)
applied to Pin 2 determines the positive peak value of the triangle,
and a negative reference voltage (2V
-) at Pin 7 sets the negative
peak value of the triangle waveform.
Since the value of the internal current source is fixed at a nominal
±500
A, the oscillator period is a function of the selected peak-
to-peak voltage excursion and the value of C
T.
The theoretical
expression for the oscillator period is:
T
OSC =
(Eq.1)
where C
T is the timing capacitor in Farads and dV is VOSC in Volts
peak-to-peak.
ERROR AMPLIFIER
The error amplifier of the SG1731 is a conventional internally-
compensated operational amplifier with low output impedance.
All of the usual feedback and frequency compensation
techniques may be use to control the closed-loop gain
characteristics. The control supply voltage ±V
S will determine the
input common mode range and output voltage swing; both will
extend to within 3V of the V
S supply.
PULSE WIDTH MODULATION
Pulse width modulation occurs by comparing the triangle
waveform to a fixed upper (+V
T)
and lower (-V
T)
threshold
voltage.
A crossing above the upper threshold causes
Output A to switch to the HIGH state, and a crossing below
-V
S = -3.5V to -15V
V
SHUTDOWN = -VS+2.4V
V
SHUTDOWN = -VS
Note 3. These parameters, although guaranteed, are not tested in production.
Note 4. Unity Gain Inverting 10K
Feedback Resistance.
Note 5. V
CM = ±12V.
2C
T dV
5 x 10
-4
As a design aid, the solutions to Equation 1 over the
recommended range of T
OSC and VOSC are given in graphic form in
Figure 1. The lower limit on T
OSC is 1.85s, corresponding to a
maximum frequency of 350 KHz. The maximum value of V
OSC,
(2V
+) - (2V-), is 10V peak-to-peak for linear waveforms.
FIGURE 1 - SG1731 OSCILLATOR PERIOD VS. V
OSC AND CT
Logic Threshold
SHUTDOWN HIGH Current
SHUTDOWN LOW Current
V
S+2.0
400
-1.0
V
S+0.8
V
A
mA
Output Drivers (Each Output)
I
SOURCE = 20mA
I
SOURCE = 100mA
I
SINK = 20mA
I
SINK = 100mA
C
L = 1000pF
C
L = 1000pF
V
ns
19.2
19.0
-19.2
-19.0
300
14
6
mA
Total Supply Current
V
S Supply Current
V
O Supply Current
V
SHUTDOWN = -VS + 0.8V
V
SHUTDOWN = -VS + 0.8V