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參數(shù)資料
| 型號(hào)： | SED1354 |
| 廠商： | 愛(ài)普生（中國(guó)）有限公司 |
| 英文描述： | Color/Monochrome Graphics LCD/CRT Controller(彩色/單色圖形LCD/CRT控制器) |
| 中文描述： | 彩色/單色圖形液晶/ CRT控制器（彩色/單色圖形液晶顯示器/ CRT顯示器控制器） |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 23K |
| 代理商： | SED1354 |
PF887-04
Color Graphics LCD/CRT Controller
I
DESCRIPTION
The SED1354 is a low cost, low power color/monochrome LCD/CRT controller interfacing to a wide range of CPUs and
LCDs. The SED1354 architecture is designed to meet the requirements of embedded markets such as Office Automation
equipment, Mobile Communications devices and Hand-Held PCs where Windows CE may serve as a primary operating
system.
The SED1354 supports LCD interfaces with data widths up to 16 bits. Using Frame Rate Modulation (FRM), it can display
16 shades of gray on monochrome LCD panels, up to 4096 colors on passive color LCDs, and 64K colors on active matrix
TFT LCD panels. CRT support is handled through the use of an external RAMDAC interface allowing simultaneous display
of both the CRT and LCD panel. A 16-bit memory interface supports up to 2M bytes of FPM-DRAM or EDO-DRAM.
Flexible operating voltages from 2.7V to 5.5V provide for very low power consumption.
I
FEATURES
SED1354
Memory Interface
16-bit EDO-DRAM or FPM-DRAM interface
Memory size options:
512K bytes using one 256Kx16 device
2M bytes using one 1M x16 device
Addressable as a single linear address space
CPU Interface
Supports the following interfaces:
Hitachi SH-3
Motorola M68K
MPU bus interface with programmable
Philips MIPS PR31500/31700
NEC MIPs Vr4102
CPU writes buffer
Display Support
4/8-bit monochrome passive LCD interface
4/8/16-bit color passive LCD interface
Single-panel, single-drive displays
Dual-panel, dual-drive displays
Direct support for 9/12-bit TFT; 18-bit TFT is
supported up to 64K color depth (16-bit data).
External RAMDAC support using the upper byte of
the LCD data bus for the RAMDAC pixel data bus
Simultaneous display of CRT and 4/8-bit passive or
9-bit TFT panels, regardless of resolution
General Purpose IO pins
Up to 12 General Purpose IO pins are available.
Display Modes
1/2/4/8/16 bit-per-pixel support on LCD
1/2/4/8 bit-per-pixel on CRT
Up to 16 shades of gray by FRM on monochrome
passive LCD panels
Up to 4096 colors on passive LCD panels
Up to 64K colors on active matrix TFT LCD in 16-
bpp modes
Split screen mode allows two different images to
be simultaneously displayed.
Virtual display mode displays images larger than
the panel size when panning and scrolling is used.
Double buffering/multi-pages for smooth animation
and instantaneous screen update
Acceleration of screen updates by allocating full
display buffer bandwidth to CPU
Clock Source
Single clock input for both pixel and memory
clocks
Memory clock can be input clock or (input clock/2),
providing flexibility to use CPU bus clock as input
Pixel clock can be memory clock or (memory
clock/2), (memory clock/3) or (memory clock/4).
Power Down Modes
Two power down modes: one software / one
hardware
LCD Power Sequencing
Package
SED1354F
0A
: QFP15-128pin
SED1354F
1A
: TQFP15-128pin
SED1354F
2A
: QFP20-144pin
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SED1355F | Embedded RAMDAC Color/Monochrome LCD/CRT Controller(嵌入RAMDAC彩色/單色LCD/CRT控制器) |
| SED1355 | SED1355 Embedded RAMDAC LCD/CRT Controller |
| SED1355-D9000 | SED1355 Embedded RAMDAC LCD/CRT Controller |
| SED1355B0C | SED1355 Embedded RAMDAC LCD/CRT Controller |
| SED1355F0A | SED1355 Embedded RAMDAC LCD/CRT Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SED1354F0A | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:LCD Controller ICs |
| SED1354F1A | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:LCD Controller ICs |
| SED1354F2A | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:LCD Controller ICs |
| SED1355 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:SED1355 Embedded RAMDAC LCD/CRT Controller |
| SED1355B0C | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:SED1355 Embedded RAMDAC LCD/CRT Controller |
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