參數(shù)資料
型號: SDE2526-5A2G
廠商: SIEMENS A G
元件分類: DRAM
英文描述: Nonvolatile Memory 2-Kbit E2PROM with I2C Bus Interface with Extended Temperature Range
中文描述: 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
封裝: PLASTIC, DSO-8
文件頁數(shù): 1/10頁
文件大?。?/td> 232K
代理商: SDE2526-5A2G
MOS IC
Nonvolatile Memory
2-Kbit E
2
PROM with
I
2
C Bus Interface
with Extended Temperature Range
SDE 2526
Semiconductor Group
82
01.96
P-DIP-8-4
P-DSO-8-1
Circuit Description
I
2
C Bus Interface
The
I
2
C Bus is a bidirectional 2-line bus for the transfer of data between various integrated circuits.
It consists of a serial data line SDA and a serial clock line SCL. The data line requires an external
pull-up resistor to
V
CC
(open drain output stage).
The possible operational states of the
I
2
C Bus are shown in
figure 1
. In the quiescent state, both
lines SDA and SCL are high, i.e. the output stage of the data line is disabled. As long a SCL remains
"1", information changes on the data bus indicate the start or the end of data transfer between two
components.
Type
Ordering Code
Package
Pin Configuration
SDE 2526-5
Q67100-H9020
P-DIP-8-4
SIEMENS
SDE 2526-5 A2G
Q67100-H9036
P-DSO-8-1 (SMD)
SIEMENS
SDE 25X26 A2
Q67100-H3261
P-DIP-8-4
STANDARD
SDE 25X26-5 A2G
Q67100-H3262
P-DSO-8-1 (SMD)
STANDARD
Features
G
Word-organized reprogrammable nonvolatile memory
in n-channel floating-gate technology (E2PROM)
G
256
×
8-bit organization
G
+ 5 V supply voltage
G
Serial 2-line bus for data input and output (
I
2C Bus)
G
Reprogramming mode, typ. 15 ms erase/write cycle
G
Reprogramming by means of on-chip control
(without external control)
G
Data retention longer than 10 years
G
More than 10
5
reprogramming cycles
per address
G
Extended temperature range from – 40 to 110
°
C
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