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SDA 9388X Block Diagram
The SDA 9388X integrates different functional blocks on a single chip
I
Signal clamping and 7-Bit
AD Converter
I
NTSC/PAL M/ PAL N Chroma
decoder
I
Decimation logic
I
72-Kbit field memory
Availability
Samples of the SDA 9388X are available with complete documentation
for evaluation. SIEMENS’ highly experienced engineering support team
can assist you with your design in work. Please contact your local
Siemens office for further details.
SDA 9388X Application Example
I
Output signal processing, i.e.
peaking
I
Triple 6-Bit DA Converter
I
RGB Switch
I
SYNC processing/generation
and memory control logic
REFL
V
REFH
V
CVBS2
CVBS1
CVBS3
Source
Select
Clamp
7-Bit ADC
Gain
Control
NTSC/PAL
Chroma
Decoder
DDA 1
V
SSA 1
V
Y
UY
Low-
pass
Filter
D
M
U
X
DD
V
SS
V
PIP Field
Memory
Line Memory
Output Signal
Processing
RGB Matrix
Framing
Triple
DAC
6-Bit
D
E
M
U
X
v/r
y/g
u/b
6
6
6
V
DDA 2
SSA 2
V
REF
V
R/V
G/Y
(OUT)
B/U
BLK
R
G
B
SEL
Closed
Caption
Data Slicer
*
Parent
Clock
Gen
*
PIP
III
plus
Clock Generation
(Quarz Oszillator)
I
2
C
Controller
SCP
VP/SCP
SCL
SDA
XIN
XQ
XFREQ
Analog
Functions
Patent Sync Signal Processing
Parent
Clock
Generation
Picture
Position
Control
RGB
Switch
3
Inset
Synchronization
Read/Write
Controller
Tuner 1
Tuner 2
CVBS 1
CVBS 2
(e.g. VCR)
CVBS 3
(e.g. SAT)
PIP III
SDA 9388X
Select
G/Y
B/U
R/V
Teletext or
OSD processor
(optional)
R G B
BLK
Sync
RGB-
Processor
R
G
B
R/V
G/Y
B/U
Color Decoder
for Main Channel
CVBS
Ordering No. B110-H7264-X-X-7600
Printed in Germany
PS 08983.
“With our on-chip system solutions
we are providing innovative, in every
respect optimized key products for
the multimedia age. In so doing
Siemens Semiconductors is going
to get one of the major players
in the market of logic ICs.”
Dr. S. Mehrgardt,
President,
Siemens Semiconductors
Signal Processing Division