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參數(shù)資料
| 型號(hào)： | SDA5250 |
| 廠商： | SIEMENS A G |
| 元件分類： | 圖文 |
| 英文描述： | ICs for Consumer Electronics |
| 中文描述： | TELETEXT AND VPS/PDC DECODER, PQCC84 |
| 文件頁(yè)數(shù)： | 81/143頁(yè) |
| 文件大小： | 1050K |
| 代理商： | SDA5250 |
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SDA 525x
Semiconductor Group
81
1998-04-08
Timer/Counter 0: Mode Selection
Timer/counter 0 can be configured in one of four operating modes, which are selected
by bit-pairs (M1, M0) in TMOD-register (see
page 83
).
– Mode 0
Putting timer/counter 0 into mode 0 makes it look like an 8048 timer, which is an 8-bit
counter with a divide-by-32 prescaler.
Figure 25
shows the mode 0 operation as it
applies to timer 0.
In this mode, the timer register is configured as a 13-bit register. As the count rolls over
from all 1 s to all 0 s, it sets the timer interrupt flag TF0. The counted input is enabled to
the timer when TR0 = 1 and either GATE = 0 or INT0 = 1. (Setting GATE = 1 allows the
timer to be controlled by external input INT0, to facilitate pulse width measurements.)
TR0 is a control bit in the special function register TCON (see
page 84
). GATE is
contained in register TMOD (see
page 83
).
The 13-bit register consists of all 8 bits of TH0 and the lower 5 bits of TL0. The upper 3
bits of TL0 are indeterminate and should be ignored. Setting the run flag (TR0) does not
clear the registers.
– Mode 1
Mode 1 is the same as mode 0, except that the timer/counter 0 register is being run with
all 16 bits.
– Mode 2
Mode 2 configures the timer/counter 0 register as an 8-bit counter (TL0) with automatic
reload, as shown on see
page 83
. Overflow from TL0 not only sets TF0, but also reloads
TL0 with the contents of TH0, which is preset by software. The reload leaves TH0
unchanged.
– Mode 3
Timer/counter 0 in mode 3 establishes TL0 and TH0 as two separate counters. The logic
for mode 3 on timer 0 is shown in
Figure 27
. TL0 uses the timer 0 control bits: C/T,
GATE, TR0, INT0 and TF0. TH0 is locked into a timer function (counting machine cycles)
and takes over the use of TR1 and TF1 from timer 1. Thus, TH0 now controls the “timer
1” interrupt.
Mode 3 is provided for applications requiring an extra 8-bit timer or counter. With timer
0 in mode 3, the processor can operate as if it has three timers/counters. When timer 0
is in mode 3, timer 1 can be turned on and off by switching it out of and into its own mode
3, or can still be used in any application not requiring an interrupt.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SDA5250M | ICs for Consumer Electronics |
| SDA5251 | ICs for Consumer Electronics |
| SDA5251M | ICs for Consumer Electronics |
| SDA5254 | 8-BIT SINGLE CHIP MICROCONTROLLERS |
| SDA5254-2 | ICs for Consumer Electronics |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SDA5250-2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
| SDA5250M | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
| SDA5250M-2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
| SDA5251 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
| SDA5251-2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
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