參數(shù)資料
型號: SD60C52
廠商: AUK Corp
英文描述: CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER
中文描述: CMOS單分量8位微機
文件頁數(shù): 6/13頁
文件大小: 102K
代理商: SD60C52
KSI-W015-000
6
Idle Mode
In the Idle mode, the CPU puts itself to sleep while all the on chip peripherals stay active.
The instruction that invokes the Idle mode is the last instruction executed in the normal
operating mode before Idle mode is activated.
The content of the on-chip RAM and all the special function registers remain intact during
this mode. The Idle mode can be terminated either by any enabled interrupt, at which time the
process is picked up at the interrupt service routine and continued, or by a hardware reset
which starts the processor the same as a power on reset.
Power Down Mode
In the power down mode the oscillator is stopped, and the instruction that invokes power
down is the last instruction executed. The on-chip RAM and special function register
retain their values until the power down mode is terminated.
The only exit from power down is a hardware reset. Reset redefines the SFRs but does
not change the on-chip RAM. The reset should not be activated before V
CC
is restored
to its normal operating level and must be held active long enough to allow the oscillator to
restart and stabilize.
The control bits for the reduced power modes are in the special function register PCON.
Table. Status of the external pins during Idle and power down modes.
Mode
Program
Memory
ALE
PSEN
PORT 0 PORT 1 PORT 2 PORT 3
Idle
Internal
1
1
Data
Data
Data
Data
Idle
External
1
1
Float
Data
Address
Data
Power
Down
Power
Down
Internal
0
0
Data
Data
Data
Data
External
0
0
Float
Data
Data
Data
SD60C32/P SD60C52/P
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