
2
Data
De
vice
Cor
por
ation
www
.d
dc-web.com
SD-14531
FIGURE 1. SD-14531 BLOCK DIAGRAM
HIGH
ACCURACY
CONTROL
TRANSFORMER
GAIN
DEMODULATOR
ERROR
PROCESSOR
VCO
16 BIT
UP/DOWN
COUNTER
U
T
VEL
D
SIN
(
θ-φ)
e
SIN
θ
COS
θ
3 STATE
TTL BUFFER
3 STATE
TTL BUFFER
VOLTAGE
DOUBLER
INHIBIT
TRANSPARENT
LATCH
16 BIT CT
TRANSPARENT
LATCH
16 BIT OUTPUT
TRANSPARENT
LATCH
EDGE
TRIGGERED
LATCH
DIGITAL
ANGLE
φ
Q
+8.6 V
S1
INH
BITS 1-8
HBE
50 ns DELAY
RESOLUTION
CONTROL
PROGRAMMABLE
SYNCHRO/
RESOLVER
CONDITIONER
1 LSB ANTIJITTER FEEDBACK
S
SR
R
S2
S3
S4
SYNTHESIZED
REF
REFERENCE
CONDITIONER
BIT DETECT
RH
RL
REF IN
LOS
ANALOG RETURN
V(+4.3 V)
V
+5 V
14B
LBE
BITS 9-16
T
U
INH
R
E
CB
VEL
e
BIT