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參數(shù)資料
| 型號： | SCG2500-77.76M |
| 廠商： | Connor-Winfield |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OSC CLK GEN 77.76MHZ OUT SMD |
| 標準包裝： | 1 |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 是 |
| 輸入： | 時鐘 |
| 輸出： | CMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:1 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 77.76MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SMD 模塊 |
| 包裝： | 管件 |
| 其它名稱： | CW640 SCG2500 77.76M SCG250077.76M |
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
SCG2500
Synchronous Clock
Generators
US Headquarters:
630-851-4722
European Headquarters:
+353-61-472221
General Description
The SCG2500 is a mixed-signal phase lock loop
generating CMOS outputs from an intrinsically low jitter
voltage controlled crystal oscillator.
The SCG2500 can lock to one of two possible input
reference frequencies at 8 kHz which is selectable using
one input select pin.
Further features include an alarm output to indicate
Loss of Reference, LOR, or Loss of Lock, LOL. If only
one of the references is lost, the unit will disable its
phase detector and will signal an alarm, but will not
switch reference automatically. If both references are
lost, the SCG2500 will enter a Free Run state which will
guarantee a 20 ppm accurate output. Additionally, the
Free Run mode may be entered manually by applying a
high signal to the Force Free Run pin. If the unit is in
Free Run mode, the Free Run status pin will be high.
All outputs, except the Oscillator Output, may be put
into the tri-state high impedance condition for external
testing purposes by applying a high signal to the Reset/
Tri-State pin.
The filtered 8 kHz is derived from the oscillator
output. The offset between the filtered output and the
reference input will change with each reference
rearrangement.
The package maximum dimensions are .780” x .830”
x .35” on a six layer FR4 board with surface mount pins.
Parts are assembled using high temperature solder to
withstand surface mount reflow process.
Features
Phase Locked Output
Frequency Control
Intrinsically Low Jitter Crystal
Oscillator
Two Selectable References @ 8
kHz
Alarm Output
Tri-Statable Alarm Outputs and
Reference Output
Force Free Run Function
Automatic Free Run Operation
upon loss of both references
Input Duty Cycle Tolerant
3.3 Volt Power Supply
Small Size: 0.78” x 0.83” x 0.35”
maximum
Surface Mount, DIL Package
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| SCG4500-155.52M | 功能描述:IC OSC CLK GEN 155.52MHZ OUT SMD RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC 包裝:管件 |
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