參數(shù)資料
型號(hào)： SCAN921260UJBX
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 通用總線功能
英文描述： X6 1:10 Deserializer with IEEE 1149.1 (JTAG) and at-speed BIST
中文描述： HEX LINE RECEIVER, PBGA196
封裝： LBGA-196
文件頁(yè)數(shù)： 14/16頁(yè)
文件大小： 379K
代理商： SCAN921260UJBX
Pin Descriptions
Pin Name
Type
Pins
Description
SEL (0:2)
CMOS
Input
B13, C12, C13
These pins control which Bus LVDS input is
steered to the CHTST output. The Control
Pins Truth Table describes their function.
There are weak internal pull-ups that should
default all SEL(0:2) to high. For example, if
you choose not to use Channel Test Mode
and want the CHTST output permanently
disabled, you can tie SEL2 and SEL1 high
and SEL0 low. In a noisy operating
environment, it is recommended that an
external pull up be used to ensure that
SELn is in the high state.
Rin +/- n
Bus LVDS
Input
A4-A3, A7-A6, A10-A9, A13-A12, C6-C5,
C9-C8, C11-C10,
A5, A8, B7, B8, B11
A11, B6, B9, C7
Bus LVDS differential input pins
AGND
AVDD
Analog Ground
Analog Voltage Supply
A low on this pin puts the device into sleep
mode and a high makes the part active.
There is an internal pull-down that defaults
PWRDN to sleep mode. Active operation
requires asserting a high on PWRDN.
Enables the Routn and RCLKn outputs.
There is an internal pull-down that defaults
REN to TRI-STATE the outputs. Active
outputs require asserting a high on REN.
PWRDN
CMOS
Input
B5
REN
CMOS
Input
A2
REFCLK
CMOS
Input
CMOS
Output
B4
Frequency reference clock input.
CHTST
C3
Allows low speed testing of the Rin inputs
under control of the SEL (0:2) pins.
Indicates the status of the PLLs for the
individual deserializers: LOCK= L indicates
locked, LOCK= H indicates unlocked.
LOCK (0:5)
CMOS
Output
F3, P1, N3, P12, P13, D13
Rout nx
CMOS
Output
E2, E4, E12, E13, E14, F4, G3, G4, G11,
G12, H2, H3, H4, H11, H12, J2, J3, J11,
J12, K2, K3, K4, K12, K13, L1, L3, L6, L8,
L9, L11, L12, L13, L14, M1, M2, M3, M4,
M5, M6, M7, M8, M9, M10, M11, M12, M14,
N1, N2, N4, N6, N9, N11, N12, N13, N14,
P2, P3, P4, P11, P14
Outputs for the ten bit deserializers, n =
deserializer number, x = bit number
RCLK (0:5)
CMOS
Output
F2, F13, L2, M13, N5, N10
Recovered clock for each deserializer’s
output data.
DVDD
B1, B3, C4, D6, D12, E6, E7, E9, E10, F7,
F10, F12, G6, G10, H6, H10, J5, J8, J9,
J10, K5, K6, K7, K10, L10
A1, B2, B14, D4, D5, D7, D9, D11, E5, E8,
F5, F6, F9, G5, G7, G8, G9, H5, H7, H8,
H9, J6, J7, K8, K9, L7
E1, F1, F14, G14, J1, J14, K1, K14, P5, P6,
P9, P10
A14, B12, D10, F8, G1, G2, G13, H1, H13,
H14, J4, J13, N7, N8, P7, P8
Digital Supply Voltage.
DGND
Digital Ground.
PVDD
PLL Supply Voltage.
PGND
PLL Ground.
S
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SCAN921821 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual 18-Bit Serializer with Pre-emphasis, IEEE 1149.1(JTAG), and At-Speed BIST
SCAN921821TSM 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
SCAN921821TSM/NOPB 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
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SCAN926260_03 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Six 1 to 10 Bus LVDS Deserializers with IEEE 1149.1 and At-Speed BIST
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