參數(shù)資料
型號(hào)： SCAN921224
廠商： National Semiconductor Corporation
英文描述： 20-66 MHz 10 Bit Bus LVDS Serializer and Deserializer
中文描述： 20-66 MHz的10位總線LVDS串行器和解串
文件頁(yè)數(shù)： 18/20頁(yè)
文件大?。?/td> 508K
代理商： SCAN921224
Serializer Pin Description
Pin Name
I/O
I
Ball Id.
A3, B1, C1,
D1, D2, D3,
E1, E2, F2,
F4
G3
Description
DIN
Data Input. LVTTL levels inputs. Data on these pins are loaded
into a 10-bit input register.
TCLKR/F
I
Transmit Clock Rising/Falling strobe select. LVTTL level input.
Selects TCLK active edge for strobing of DIN data. High selects
rising edge. Low selects falling edge.
+ Serial Data Output. Non-inverting Bus LVDS differential output.
Serial Data Output. Inverting Bus LVDS differential output.
Serial Data Output Enable. LVTTL level input. A low puts the Bus
LVDS outputs in TRI-STATE.
Powerdown. LVTTL level input. PWRDN driven low shuts down
the PLL and TRI-STATEs outputs putting the device into a low
power sleep mode.
Transmit Clock. LVTTL level input. Input for 20 MHz–66 MHz
system clock.
Assertion of SYNC (high) for at least 1024 synchronization
symbols to be transmitted on the Bus LVDS serial output.
Synchronization symbols continue to be sent if SYNC continues to
be asserted. TTL level input. The two SYNC pins are ORed.
Digital Circuit power supply.
Digital Circuit ground.
DO+
DO
DEN
O
O
I
D7
D5
D6
PWRDN
I
C7
TCLK
I
E4
SYNC
I
A4, B3
DVCC
DGND
I
I
C3, C4, E5
A1, C2, F5,
E6, G4
A5, A6, B4,
B7, G5
B5, B6, C6,
E7, F7
F1
G1
E3
F3
G2
A2, A7, B2,
C5, D4, F6,
G6, G7
AVCC
I
Analog power supply (PLL and Analog Circuits).
AGND
I
Analog ground (PLL and Analog Circuits).
TDI
TDO
TMS
TCK
TRST
N/C
I
Test Data Input to support IEEE 1149.1
Test Data Output to support IEEE 1149.1
Test Mode Select Input to support IEEE 1149.1
Test Clock Input to support IEEE 1149.1
Test Reset Input to support IEEE 1149.1
Leave open circuit, do not connect
O
I
I
I
N/A
Deserializer Pin Description
Pin Name
I/O
O
Ball Id.
A5, B4, B6,
C4, C7, D6,
F5, F7, G4,
G5
B3
Description
ROUT
Data Output.
±
9 mA CMOS level outputs.
RCLKR/F
I
Recovered Clock Rising/Falling strobe select. TTL level input.
Selects RCLK active edge for strobing of ROUT data. High
selects rising edge. Low selects falling edge.
+ Serial Data Input. Non-inverting Bus LVDS differential input.
Serial Data Input. Inverting Bus LVDS differential input.
Powerdown. TTL level input. PWRDN driven low shuts down the
PLL and TRI-STATEs outputs putting the device into a low power
sleep mode.
RI+
RI
PWRDN
I
I
I
D2
C1
D3
S
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相關(guān)PDF資料
PDF描述
SCAN921224SLC 20-66 MHz 10 Bit Bus LVDS Serializer and Deserializer
SCAN921025H High Temperature 20-80 MHz 10 Bit Bus LVDS SerDes with IEEE 1149.1 (JTAG) and at-speed BIST
SCAN921025HSM High Temperature 20-80 MHz 10 Bit Bus LVDS SerDes with IEEE 1149.1 (JTAG) and at-speed BIST
SCAN921226H High Temperature 20-80 MHz 10 Bit Bus LVDS SerDes with IEEE 1149.1 (JTAG) and at-speed BIST
SCAN921226HSM High Temperature 20-80 MHz 10 Bit Bus LVDS SerDes with IEEE 1149.1 (JTAG) and at-speed BIST
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SCAN9212245LC 制造商:Texas Instruments 功能描述:
SCAN921224SLC 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
SCAN921224SLC/NOPB 功能描述:LVDS 接口集成電路 10-Bit Deserializer RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel
SCAN921224SLCX/NOPB 制造商:Texas Instruments 功能描述:LVDS Deserializer 49-Pin FBGA T/R
SCAN921226 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:30-80 MHz 10 Bit Bus LVDS Serializer and Deserializer with IEEE 1149.1 (JTAG) and at-speed BIST
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