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參數資料
| 型號： | SCAN182541ASSCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Non-Inverting Line Driver with 25ohm Series Resistor Outputs |
| 中文描述： | SCAN/JTAG/3J SERIES, DUAL 9-BIT BOUNDARY SCAN DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 0.300 INCH, MO-118, SSOP-56 |
| 文件頁數： | 10/11頁 |
| 文件大小： | 95K |
| 代理商： | SCAN182541ASSCX |
www.fairchildsemi.com
10
S
AC Operating Requirements
Scan Test Operation:
Note 5:
Voltage Range 5.0V
±
0.5V
Note 6:
This delay represents the timing relationship between the data input and TCK at the associated scan cells numbered 0-8, 9-17, 18-26 and 27-35.
Note 7:
Timing pertains to BSR 38 and 41 or BSR 37 and 40.
Note 8:
This delay represents the timing relationship between AOE/BOE and TCK for scan cells 36 and 39 only.
Note:
All Input Timing Delays involving TCK are measured from the rising edge of TCK.
Capacitance
Note 9:
C
OUT
is measured at frequency f
=
1 MHz, per MIL-STD-883B, Method 3012.
Symbol
Parameter
V
CC
T
A
=
40
°
C to
+
85
°
C
C
L
=
50 pF
Guaranteed Minimum
Units
(V)
(Note 5)
t
S
Setup Time
5.0
2.2
ns
Data to TCK (Note 6)
Hold Time
Data to TCK (Note 6)
t
H
5.0
1.8
ns
t
S
Setup Time, H or L
AOE
n
, BOE
n
to TCK (Note 7)
Hold Time, H or L
5.0
3.7
ns
t
H
5.0
1.8
ns
TCK to AOE
n
, BOE
n
(Note 7)
Setup Time, H or L
Internal AOE
n
, BOE
n
,
to TCK (Note 8)
Hold Time, H or L
TCK to Internal
t
S
5.0
2.7
ns
t
H
5.0
1.8
ns
AOE
n
, BOE
n
(Note 8)
Setup Time, H or L
TMS to TCK
t
S
5.0
7.5
ns
t
H
Hold Time, H or L
TCK to TMS
Setup Time, H or L
5.0
1.8
ns
t
S
5.0
5.0
ns
TDI to TCK
Hold Time, H or L
TCK to TDI
t
H
5.0
2.0
ns
t
W
Pulse Width TCK
H
5.0
10.0
10.8
ns
L
f
MAX
t
PU
t
DN
Maximum TCK Clock Frequency
Wait Time, Power Up to TCK
Power Down Delay
5.0
5.0
0.0
50
100
100
MHz
ns
ms
Symbol
Parameter
Typ
Units
Conditions, T
A
=
25
°
C
C
IN
Input Capacitance
5.8
pF
V
CC
=
0.0V
C
OUT
Output Capacitance (Note 9)
13.8
pF
V
CC
=
5.0V
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