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參數(shù)資料
| 型號： | SCAN182373ASSC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Transparent Latch with 25ohm Series Resistor Outputs |
| 中文描述： | SCAN/JTAG/3J SERIES, 9-BIT BOUNDARY SCAN MEMORY DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 0.300 INCH, MO-118, SSOP-56 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 104K |
| 代理商： | SCAN182373ASSC |
www.fairchildsemi.com
2
S
Truth Tables
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
AO
0
=
Previous AO before H-to-L transition of ALE
BO
0
=
Previous BO before H-to-L transition of BLE
=
Inactive-to-active transition must occur to enable outputs upon
power-up.
Functional Description
The SCAN182373A consists of two sets of nine D-type
latches with 3-STATE standard outputs. When the Latch
Enable (ALE or BLE) input is HIGH, data on the inputs
(AI
(0
–
8)
or BI
(0
–
8)
) enters the latches. In this condition the
latches are transparent, i.e., a latch output will change
state each time its input changes. When Latch Enable is
LOW, the latches store the information that was present on
the inputs a set-up time preceding the HIGH-to-LOW tran-
sition of the Latch Enable. The 3-STATE standard outputs
are controlled by the Output Enable (AOE
1
or BOE
1
) input.
When Output Enable is LOW, the standard outputs are in
the 2-state mode. When Output Enable is HIGH, the stan-
dard outputs are in the high impedance mode, but this
does not interfere with entering new data into the latches.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs
AO (0–8)
ALE
X
H
H
L
AOE
1
H
L
L
L
AI (0–8)
X
L
H
X
Z
L
H
AO
0
Inputs
BO (0–8)
BLE
X
H
H
L
BOE
1
H
L
L
L
BI (0–8)
X
L
H
X
Z
L
H
BO
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SCAN182373ASSCX | Transparent Latch with 25ohm Series Resistor Outputs |
| SCAN182541A | Non-Inverting Line Driver with 25ohm Series Resistor Outputs |
| SCAN182541ASSC | Non-Inverting Line Driver with 25ohm Series Resistor Outputs |
| SCAN182541ASSCX | Non-Inverting Line Driver with 25ohm Series Resistor Outputs |
| SCAN18373T | Transparent Latch with 3-STATE Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SCAN182373ASSCX | 功能描述:閉鎖 Transparent Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SCAN182374A | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:D-Type Flip-Flop with 25ヘ Series Resistor Outputs |
| SCAN182374ASSC | 功能描述:觸發(fā)器 D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SCAN182374ASSCX | 功能描述:觸發(fā)器 D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SCAN18245/M WAF | 制造商:Texas Instruments 功能描述: |
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