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參數(shù)資料
| 型號： | SCAN182373A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Transparent Latch with 25ohm Series Resistor Outputs |
| 中文描述： | 透明鎖存器與25ohm系列電阻輸出 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 104K |
| 代理商： | SCAN182373A |
www.fairchildsemi.com
4
S
Description of BOUNDARY-SCAN Circuitry
The scan cells used in the BOUNDARY-SCAN register are
one of the following two types depending upon their loca-
tion. Scan cell TYPE1 is intended to solely observe system
data, while TYPE2 has the additional ability to control sys-
tem data.
Scan cell TYPE 1 is located on each system input pin while
scan cell TYPE2 is located at each system output pin as
well as at each of the two internal active-high output enable
signals. AOE controls the activity of the A-outputs while
BOE controls the activity of the B-outputs. Each will acti-
vate their respective outputs by loading a logic high.
The BYPASS register is a single bit shift register stage
identical to scan cell TYPE1. It captures a fixed logic low.
Bypass Register Scan Chain Definition
Logic 0
SCAN182373A Product IDCODE
(32-Bit Code per IEEE 1149.1)
The INSTRUCTION register is an 8-bit register which cap-
tures the default value of 10000001 (SAMPLE/PRELOAD)
during the CAPTURE-IR instruction command. The benefit
of capturing SAMPLE/PRELOAD as the default instruction
during CAPTURE-IR is that the user is no longer required
to shift in the 8-bit instruction for SAMPLE/PRELOAD. The
sequence of: CAPTURE-IR
→
EXIT1-IR
→
UPDATE-IR
will update the SAMPLE/PRELOAD instruction. For more
information refer to the section on instruction definitions.
Instruction Register Scan Chain Definition
Scan Cell TYPE1
Scan Cell TYPE2
Version Entity
Part
Number
Manufacturer Required by
ID
1149.1
1
0000
MSB
111111 0000001000 00000001111
LSB
MSB
→
LSB
Instruction Code
00000000
10000001
10000010
00000011
01000001
01000010
00100010
10101010
11111111
All Others
Instruction
EXTEST
SAMPLE/PRELOAD
CLAMP
HIGH-Z
SAMPLE-IN
SAMPLE-OUT
EXTEST-OUT
IDCODE
BYPASS
BYPASS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SCAN182373ASSC | Transparent Latch with 25ohm Series Resistor Outputs |
| SCAN182373ASSCX | Transparent Latch with 25ohm Series Resistor Outputs |
| SCAN182541A | Non-Inverting Line Driver with 25ohm Series Resistor Outputs |
| SCAN182541ASSC | Non-Inverting Line Driver with 25ohm Series Resistor Outputs |
| SCAN182541ASSCX | Non-Inverting Line Driver with 25ohm Series Resistor Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SCAN182373ASSC | 功能描述:閉鎖 Transparent Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SCAN182373ASSCX | 功能描述:閉鎖 Transparent Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SCAN182374A | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:D-Type Flip-Flop with 25ヘ Series Resistor Outputs |
| SCAN182374ASSC | 功能描述:觸發(fā)器 D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SCAN182374ASSCX | 功能描述:觸發(fā)器 D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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