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參數(shù)資料
| 型號(hào)： | SCAN12100 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 1228.8 and 614.4 Mbps CPRI SerDes with Auto RE Sync and Precision Delay Calibration Measurement |
| 中文描述： | 1228.8和614.4 Mbps的CPRI串行解串器與自動(dòng)重新同步和高精度延遲校準(zhǔn)測(cè)量 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 217K |
| 代理商： | SCAN12100 |
Symbol
Parameter
Condition
Min
Typ
(Note 2)
-20
Max
Units
RLR
I
t
LAT-R
Input Return Loss (Note 10)
Frequency = 1.229 GHz
-15
dB
Receive latency (Note 8)
614.4 Mbps
1.228 Gbps
280
140
ns
ns
JIT
R-TOL
Total input jitter tolerance (Note 10) Input CJPAT with BER of 10
12
(Note 4)
Input data rate reference to local
transmit data rate.
K28.5 pattern at 1228.8 Mbps
0.66
UIp-p
F
R-LOCK
Receiver lock range
200
+200
ppm
t
R-LOCK
TRANSMITTER INPUT TIMING SPECIFICATIONS
t
S-T
Setup Time
Maximum lock time
1
ms
DIN [9:0] valid to TXCLK rising or
falling edge
TXCLK rising or falling edge to DIN
[9:0] valid
TXCLK duty cycle
0.5
ns
t
H-T
Hold Time
0.5
ns
t
DC
f
TXCLK
RECEIVER OUTPUT TIMING SPECIFICATIONS (Read Mode RXCLKMODE=1)
t
PDRX
RXCLK Propagation Delay
Duty cycle
45
55
%
TXCLK frequency
30
62.5
MHz
RXCLK rising or falling edge to
ROUT [9:0] valid
RXCLK input duty cycle
2
4
6
ns
t
DC
f
RXCLKR
t
R
, t
F
Duty cycle
45
55
%
RXCLK input frequency
RXCLK input frequency
30
62.5
MHz
Output data transition time
For ROUT [0-9], LOCK, etc. pins.
Measured between 20% and 80%
levels
0.35
ns
RECEIVER OUTPUT TIMING SPECIFICATIONS (Write Mode RXCLKMODE=0)
t
S-R
Setup Time
ROUT [9:0] valid to RXCLK rising or
falling edge (Note 9)
RXCLK rising or falling edge to
ROUT [9:0] valid (Note 9)
RXCLK duty cycle
2.2
ns
t
H-R
Hold Time
2.4
ns
t
DC
f
RXCLK
t
R
, t
F
Duty cycle
45
55
%
RXCLK frequency
30
62.5
MHz
Output data transition time
For ROUT [0-9], LOCK, etc. pins.
Measured between 20% and 80%
levels
0.35
ns
CDET OUTPUT TIMING SPECIFICATIONS (Read Mode RXCLKMODE=1)
t
PDCD
CDET Propagation Delay
RXCLK rising or falling edge to
CDET
2
4
6
ns
CDET OUTPUT TIMING SPECIFICATIONS (Write Mode RXCLKMODE=0)
(Note 5)
t
S-C
Setup Time
CDET valid to RXCLK rising or
falling edge
RXCLK rising or falling edge to
CDET valid
2.6
ns
t
H-C
Hold Time
2.6
ns
SYSCLK LVDS OUTPUT TIMING SPECIFICATIONS
t
SYSCLKNDC
Duty cycle
JIT
SYSCLK
Cycle to cycle jitter
t
R
, t
F
Output transition time
40
60
%
(Note 10)
40
65
ps p-p
Between 20% and 80% levels (Note
10)
0.1
0.3
ns
MDC/MDIO TIMING SPECIFICATIONS (Clause 45)
f
MDC
MDC Frequency
t
S-MDIO
Setup Time
0
2.5
MHz
MDIO (input) valid to MDC rising
clock
10
ns
9
www.national.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SCAN12100TYA | 制造商:Texas Instruments 功能描述:CPRI SerDes 100-Pin TQFP 制造商:Texas Instruments 功能描述:1228.8 AND 614.4 MBPS CPRI SERDES WITH A - Trays 制造商:Texas Instruments 功能描述:IC SERIAL/DESERIAL CPRI 100-TQFP |
| SCAN12100TYA/NOPB | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| SCAN15MB200 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual 1.5 Gbps 2:1/1:2 LVDS Mux/Buffer with Pre-Emphasis and IEEE 1149.6 |
| SCAN15MB200EVK | 功能描述:界面開發(fā)工具 SCAN15MB200 EVAL BOARD RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| SCAN15MB200TSQ | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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