參數(shù)資料
型號: SC604-RL1
廠商: Electronic Theatre Controls, Inc.
英文描述: Speech And Music Processor
中文描述: 語音和音樂處理器
文件頁數(shù): 1/13頁
文件大?。?/td> 293K
代理商: SC604-RL1
SC-604
Speech And Music Processor
Data sheet
2002 Sensory Inc.
P/N 80-0208-B
1
Features
Advanced, Integrated Speech Synthesizer for
High-Quality Sound
Operates up to 12.32 MHz (Performs up to 12
MIPS)
Slave Mode Enables Hours of Speech Using an
External Processor and Memory
Master Mode Allows 6.8 Minutes of Speech
Onboard
Supports High-Quality Synthesis Algorithms
such as MX, CX, Simple CX, LX, ADPCM, and
Polyphonic Music
Simultaneous Speech Plus Music Capabilities
Very Low-Power Operation, Ideal for Hand-Held
Devices
Low-Voltage Operation, Sustainable by Three
(3) Batteries
Reduced Power Standby Modes, Less Than 10
μ
A in Deep-Sleep Mode
16 General-Purpose I/O Pins (in Master Mode)
or 4 General-Purpose I/O Pins (in Slave Mode)
Resistor-Trimmed Oscillator or 32.768-kHz
Crystal Reference Oscillator
Slave Interface Logic Contains 64K Bytes-
Words Onboard ROM (2K Words Reserved)
640-Word RAM
Direct Speaker Drive, 32
(PDM)
One-Bit Comparator With Edge Detection
Interrupt Service
Serial Scan Port for In-Circuit Emulation,
Monitor, and Test
Available in Die Form or 64-Pin LQFP Package
Description
The SC-604 is a low-cost, mixed-signal
processor that combines a speech synthesizer
with a dedicated slave interface logic, general-
purpose I/O, onboard ROM, and direct speaker-
drive in a single package. The computational
unit uses a powerful new DSP that gives the SC-
604 unprecedented speed and computational
flexibility compared with previous devices of its
type. The SC-604 supports a variety of speech
and audio coding algorithms, providing a range
of options with respect to speech duration and
sound quality.
The device consists of a micro-DSP core,
embedded program and data memory, and a self-contained clock generation system. General-purpose
periphery is comprised of 16 bits of partially configurable I/O.
The core processor is a general-purpose 16-bit microcontroller with DSP capability. The basic core block
includes a computational unit (CU), data address unit, program address unit, two timers, eight-level interrupt
processor, and several system and control registers. The core processor gives the SC-604break-point capability
in emulation.
The processor is a Harvard type for efficient DSP algorithm execution, separating program and data memory
blocks to permit simultaneous access. The ROM has a protection scheme to prevent third-party pirating. It is
configured in 32K 17-bit words.
The total ROM space is divided into two areas:
1) The lower 2K words are reserved by Sensory, Inc. for a built-in self-test
2) The upper 30K is for user program and data space.
SC-691 Block Diagram
16-Bit
Microprocessor
640-words
RAM
TIMER 1
TIMER 2
PLLM
10-Bit
DAC
SLAVE LOGIC
64K-Bytes ROM
COMPARATOR
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