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SC415
21
Applications Information (continued)
SC415 System DC Accuracy (VOUT Controller)
Three factors affect VOUT accuracy: the trip point of the FB
error comparator, the switching frequency variation with
line and load, and the external resistor tolerance. The error
comparator offset is trimmed to trip when the feedback
pin is 750mV, +/-1% over the range of 0 to 85°C.
The on-time pulse is programmed using the RTON resistor
to give a desired frequency. However, some frequency
variation with line and load is expected. This variation
changes the output ripple voltage. Because constant
on-time converters regulate to the valley of the output
ripple, of the output ripple appears as a DC regulation
error. For example, If the output ripple is 50mV with VIN
= 6 volts, then the measured DC output will be 25mV
above the comparator trip point. If the ripple increases to
80mV with VIN = 25 volts, then the measured DC output
will be 40mV above the comparator trip. The best way to
minimize this effect is to minimize the output ripple.
The use of 1% feedback resistors contributes typically
1% error. If tighter DC accuracy is required use 0.1%
resistors.
The output inductor value may change with current. This
will change the output ripple and thus the DC output
voltage. The output ESR also affects the ripple and thus
the DC output voltage.
Switching Frequency Variations
The switching frequency will vary somewhat due to
line and load conditions. The line variations are a result
of a fixed offset in the on-time one-shot, as well as
unavoidable delays in the external MOSFET switching.
As input voltage increases, these factors make the actual
DH on-time slightly longer than the idealized on-time.
The net effect is that frequency tends to fall slightly with
increasing input voltage.
The frequency variation with load is due to losses in
the power train from IR drop and switching losses. For
a conventional PWM constant-frequency topology, as
load increases the duty cycle also increases slightly to
compensate for IR and switching losses in the MOSFETs
and inductor. A constant on-time topology must also
overcome the same losses by increasing the effective
duty cycle (more time is spent drawing energy from VIN as
losses increase). Since the on-time is constant for a given
VOUT/VIN combination, the way to increase duty cycle is
to gradually shorten the off-time. The net effect is that
switching frequency increases slightly with increasing
load.