參數(shù)資料
型號: SC28L92A1BS,551
廠商: NXP Semiconductors
文件頁數(shù): 15/73頁
文件大?。?/td> 0K
描述: IC UART DUAL W/FIFO 44PQFP
標(biāo)準(zhǔn)包裝: 490
系列: IMPACT
特點: 故障啟動位檢測
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
電源電壓: 3.3V,5V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-HVQFN EP(6x6)
包裝: 托盤
其它名稱: 935281063551
SC28L92A1BS-S
SC28L92A1BS-S-ND
22
2552K–AVR–04/11
ATmega329/3290/649/6490
7.5
Register Description
7.5.1
EEARH and EEARL – The EEPROM Address Register
Bits 15:11 – Reserved Bits
These bits are reserved bits in the ATmega329/3290/649/6490 and will always read as zero.
Bits 10:0 – EEAR10:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
1/2K bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and
1023/2047. The initial value of EEAR is undefined. A proper value must be written before the
EEPROM may be accessed.
Note:
EEAR10 is only valid for ATmega649 and ATmega6490.
7.5.2
EEDR – The EEPROM Data Register
Bits 7:0 – EEDR7:0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
7.5.3
EECR – The EEPROM Control Register
Bits 7:4 – Reserved Bits
These bits are reserved bits in the ATmega329/3290/649/6490 and will always read as zero.
Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I bit in SREG is set. Writing
EERIE to zero disables the interrupt. The EEPROM Ready interrupt generates a constant inter-
rupt when EEWE is cleared.
Bit 2 – EEMWE: EEPROM Master Write Enable
The EEMWE bit determines whether setting EEWE to one causes the EEPROM to be written.
When EEMWE is set, setting EEWE within four clock cycles will write data to the EEPROM at
Bit
151413121110
9
8
EEAR10
EEAR9
EEAR8
EEARH
EEAR7
EEAR6
EEAR5
EEAR4
EEAR3
EEAR2
EEAR1
EEAR0
EEARL
76
543210
Read/Write
RRRRR
R/W
Initial Value
0
X
XXXXXXX
X
Bit
7
6543
210
MSB
LSB
EEDR
Read/Write
R/W
Initial Value
0
0000
000
Bit
7654
3210
––––
EERIE
EEMWE
EEWE
EERE
EECR
Read/Write
R
R/W
Initial Value
0000
00
X
0
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