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參數(shù)資料
| 型號： | SC1109 |
| 廠商： | Semtech Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無電容，NMOS管，150mA的低壓差穩(wěn)壓器的反向電流保護 |
| 文件頁數(shù)： | 16/17頁 |
| 文件大?。?/td> | 223K |
| 代理商： | SC1109 |
SYNCHRONOUS PWM CONTROLLER WITH
DUAL LOW DROPOUT REGULATOR
CONTROLLERS
2000 SEMTECH CORP.
PRELIMINARY - October 16, 2000
SC1109
16
TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com
)
1
R
I
P
)
on
(
DS
2
O
COND
d
=
FET type
R
DS(on)
(m
) P
D
(W)
Package
IRL34025
15
1.69
D
2
PAK
D
2
PAK
IRL2203
10.5
1.19
Si4410
20
2.26
SO-8
FET type
R
DS(on)
(m
) P
D
(W)
15
10.5
20
Package
IRL34025
IRL2203
Si4410
1.33
0.93
1.77
D
2
PAK
D
2
PAK
SO-8
BOTTOM FET - Bottom FET losses are almost entirely
due to conduction. The body diode is forced into conduc-
tion at the beginning and end of the bottom switch con-
duction period, so when the FET turns on and off, there
is very little voltage across it, resulting in low switching
losses. Conduction losses for the FET can be deter-
mined by:
For the example above:
Each of the package types has a characteristic thermal
impedance, for the TO-220 package, thermal impedance
is mostly determined by the heatsink used. For the sur-
face mount packages on double sided FR4, 2 oz printed
circuit board material, thermal impedances of 40
o
C/W
for the D
2
PAK and 80
o
C/W for the SO-8 are readily
achievable. The corresponding temperature rise is de-
tailed below:
Temperature rise (
o
C)
FET type
Top FET
Bottom FET
IRL34025
IRL2203
Si4410
67.6
47.6
180.8
53.2
37.2
141.6
It is apparent that single SO-8 Si4410 are not adequate for
this application, but by using parallel pairs in each posi-
tion, power dissipation will be approximately halved and
temperature rise reduced by a factor of 4.
INPUT CAPACITORS - since the RMS ripple current in
the input capacitors may be as high as 50% of the out-
put current, suitable capacitors must be chosen ac-
cordingly. Also, during fast load transients, there may
be restrictions on input di/dt. These restrictions require
useable energy storage within the converter circuitry,
either as extra output capacitance or, more usually,
additional input capacitors. Choosing low ESR input
capacitors will help maximize ripple rating for a given
size.
Using 1.5X Room temp R
DS(ON)
to allow for temperature
rise.
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