參數(shù)資料
型號(hào): SB74LV21A
廠商: Texas Instruments, Inc.
英文描述: DUAL 4-INPUT POSITIVE-AND GATES
中文描述: 雙4輸入陽(yáng)性與門
文件頁(yè)數(shù): 2/11頁(yè)
文件大?。?/td> 309K
代理商: SB74LV21A
SCES340D SEPTEMBER 2000 REVISED DECEMBER 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
(each gate)
INPUTS
B
OUTPUT
Y
A
C
D
H
H
H
H
H
L
X
X
X
L
X
L
X
X
L
X
X
L
X
L
X
X
X
L
L
logic diagram (positive logic)
1A
1B
1C
1D
1Y
2A
2B
2C
2D
2Y
1
2
4
5
9
10
12
13
6
8
Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Output voltage range applied in high or low state, V
O
(see Notes 1 and 2)
Output voltage range applied in power-off state, V
O
(see Note 1)
Input clamp current, I
IK
(V
I
< 0)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θ
JA
(see Note 3): D package
DB package
DGV package
NS package
PW package
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
0.5 V to 7 V
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.5 V to V
CC
+ 0.5 V
0.5 V to 7 V
. . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . .
20 mA
50 mA
±
25 mA
±
50 mA
86
°
C/W
96
°
C/W
127
°
C/W
76
°
C/W
113
°
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
65
°
C to 150
°
C
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