參數(shù)資料
型號(hào): SAL-XC886CLM-8FFA5V
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 80 MHz, MICROCONTROLLER, PQFP48
封裝: GREEN, PLASTIC, TQFP-48
文件頁數(shù): 115/134頁
文件大?。?/td> 864K
代理商: SAL-XC886CLM-8FFA5V
SAL-XC886CLM
Functional Description
Data Sheet
74
V1.0, 2010-05
3.8.2
Clock Management
The CGU generates all clock signals required within the microcontroller from a single
clock,
f
sys. During normal system operation, the typical frequencies of the different
modules are as follow:
CPU clock: CCLK, SCLK = 20 MHz
Fast clock (used by MultiCAN): FCLK = 20 or 40 MHz
Peripheral clock: PCLK = 20 MHz
Flash Interface clock: CCLK2 = 40 MHz and CCLK = 20 MHz
In addition, different clock frequencies can be output to pin CLKOUT (P0.0 or P0.7). The
clock output frequency, which is derived from the clock output divider (bit COREL), can
further be divided by 2 using toggle latch (bit TLEN is set to 1). The resulting output
frequency has a 50% duty cycle. Figure 25 shows the clock distribution of the SAL-
XC886.
Figure 25
Clock Generation from
f
sys
PLL
N,P,K
fsys=
80 MHz
CLKREL
CCLK
SCLK
PCLK
CCLK2
CORE
Peripherals
FLASH
Interface
OSC
CLKOUT
fosc
COREL
COUTS
Toggle
Latch
TLEN
/2
MultiCAN
FCLK
FCCFG
/2
SD
0
1
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