參數(shù)資料
型號: SAH-XC2224L-12F80V
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQCC48
封裝: 0.50 MM PITCH, GREEN, PLASTIC, VQFN-48
文件頁數(shù): 42/112頁
文件大小: 3122K
代理商: SAH-XC2224L-12F80V
XC2220L, XC2224L
XC2000 Family / Econo Line
Functional Description
PRELIMINARY
Data Sheet
31
V1.0, 2010-12
3.3
Memory Protection Unit (MPU)
The XC222[04]L’s Memory Protection Unit (MPU) protects user-specified memory areas
from unauthorized read, write, or instruction fetch accesses. The MPU can protect the
whole address space including the peripheral area. This completes established
mechanisms such as the register security mechanism or stack overrun/underrun
detection.
Four Protection Levels support flexible system programming where operating system,
low level drivers, and applications run on separate levels. Each protection level permits
different access restrictions for instructions and/or data.
Every access is checked (if the MPU is enabled) and an access violating the permission
rules will be marked as invalid and leads to a protection trap.
A set of protection registers for each protection level specifies the address ranges and
the access permissions. Applications requiring more than 4 protection levels can
dynamically re-program the protection registers.
3.4
Memory Checker Module (MCHK)
The XC222[04]L’s Memory Checker Module calculates a checksum (fractional
polynomial division) on a block of data, often called Cyclic Redundancy Code (CRC). It
is based on a 32-bit linear feedback shift register and may, therefore, also be used to
generate pseudo-random numbers.
The Memory Checker Module is a 16-bit parallel input signature compression circuitry
which enables error detection within a block of data stored in memory, registers, or
communicated e.g. via serial communication lines. It reduces the probability of error
masking due to repeated error patterns by calculating the signature of blocks of data.
The polynomial used for operation is configurable, so most of the commonly used
polynomials may be used. Also, the block size for generating a CRC result is
configurable via a local counter. An interrupt may be generated if testing the current data
block reveals an error.
An autonomous CRC compare circuitry is included to enable redundant error detection,
e.g. to enable higher safety integrity levels.
The Memory Checker Module provides enhanced fault detection (beyond parity or ECC)
for data and instructions in volatile and non volatile memories. This is especially
important for the safety and reliability of embedded systems.
相關PDF資料
PDF描述
SAK-XC2220L-12F80V 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQCC48
SAK-XC2224L-12F66V 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PQCC48
SAF-XC2230L-12F80L 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP64
SAF-XC2234L-20F66L 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PQFP64
SAK-XC2230L-12F80L 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP64
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