參數(shù)資料
型號： SAH-XC2220U-4F66V
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PQCC48
封裝： 0.50 MM PITCH, GREEN, PLASTIC, VQFN-48
文件頁數(shù)： 14/106頁
文件大?。?/td> 3017K
代理商： SAH-XC2220U-4F66V
XC2220U
XC2000 Family / Compact Line
General Device Information
PRELIMINARY
Data Sheet
11
V1.0, 2010-12
Key to Pin Definitions
Ctrl.: The output signal for a port pin is selected by bit field PC in the associated
register Px_IOCRy. Output O0 is selected by setting the respective bit field PC to
1x00B, output O1 is selected by 1x01B, etc.
Output signal OH is controlled by hardware.
Type: Indicates the pad type and its power supply domain (B, M).
– St: Standard pad
– Sp: Special pad e.g. XTALx
– DA: Digital IO and analog input
– In: Input only pad
– PS: Power supply pad
Table 6
Pin Definitions and Functions
Pin
Symbol
Ctrl.
Type Function
1
TESTM
IIn/B
Testmode Enable
Enables factory test modes, must be held HIGH for
normal operation (connect to
V
DDPB).
An internal pullup device will hold this pin high
when nothing is driving it.
2TRST
IIn/B
Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XC2220U’s debug
system. In this case, pin TRST must be driven low
once to reset the debug system.
An internal pulldown device will hold this pin low
when nothing is driving it.
3
P6.3
O0 / I St/B
Bit 3 of Port 6, General Purpose Input/Output
T3OUT
O2
St/B
GPT12E Timer T3 Toggle Latch Output
ADC0_REQT
RyF
ISt/B
External Request Trigger Input for ADC0/1
4
P6.1
O0 / I DA/B Bit 1 of Port 6, General Purpose Input/Output
ADC0_CH17
I
DA/B Analog Input Channel 17 for ADC0
EMUX1
O1
DA/B External Analog MUX Control Output 1 (ADC0)
T3OUT
O2
DA/B GPT12E Timer T3 Toggle Latch Output
ADC0_REQT
RyE
IDA/B External Request Trigger Input for ADC0
ESR1_6
I
DA/B ESR1 Trigger Input 6
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