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參數(shù)資料
| 型號： | SAF-C505-LM |
| 廠商： | SIEMENS A G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, MQFP-44 |
| 文件頁數(shù)： | 59/85頁 |
| 文件大小： | 487K |
| 代理商： | SAF-C505-LM |
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C505L
Data Sheet
57
06.99
Lock Bits Programming / Read
The C505L has two programmable lock-bits that, when programmed according to
Table 13
, provide
four levels of protection for the on-chip OTP code memory.
Note: A “1” means that the lock-bit is not programmed. A “0” means that lock-bit is programmed.
Table 12
Access Modes Selection
Access Mode
EA/
V
PP
PROG
PRD
PMSEL
Address
(Port 2)
Data
(Port 0)
1
0
Program OTP memory byte
V
PP
V
IH
V
PP
V
IH
V
IH
H
H
H
A0-7
A8-14
D0-7
Read OTP memory byte
H
Program OTP lock bits
H
H
L
–
D1,D0 see
Table 13
Read OTP lock bits
H
Read OTP version byte
H
L
H
Byte addr.
of sign. byte
D0-7
Table 13
Lock Bit Protection Types
Lock Bits at D1,D0
Protection
Level
Protection Type
D1
D0
1
1
Level 0
The OTP lock feature is disabled. During normal operation of
the C505L, the state of the EA pin is not latched on reset.
1
0
Level 1
During normal operation of the C505L, MOVC instructions
executed from external program memory are prevented from
fetching code bytes from internal memory. EA is sampled and
latched on reset. An OTP memory read operation is only
possible in the OTP verification mode. Further programming of
the OTP memory is disabled (reprogramming security).
0
1
Level 2
Same as level 1, but OTP memory read operation using OTP
verification mode is disabled.
0
0
Level 3
Same as level 2, but external code execution by setting
EA = low during normal operation of the C505L is not possible.
External code execution, which is initiated by an internal
program (e.g. by an internal jump instruction above the OTP
memory boundary), is still possible.
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