參數(shù)資料
型號: SAF-C165-LM3V
廠商: INFINEON TECHNOLOGIES AG
英文描述: 16-Bit Single-Chip Microcontroller
中文描述: 16位單片機(jī)
文件頁數(shù): 70/77頁
文件大?。?/td> 1371K
代理商: SAF-C165-LM3V
C165
Data Sheet
66
V2.0, 2000-12
AC Characteristics
CLKOUT and READY (Reduced Supply Voltage)
(Operating Conditions apply)
Parameter
Symbol
Max. CPU Clock
= 20 MHz
min.
50
15
13
0 +
t
A
Variable CPU Clock
1 / 2TCL = 1 to 20 MHz
min.
2TCL
TCL - 10
TCL - 12
0 +
t
A
Unit
max.
50
12
8
8 +
t
A
max.
2TCL
12
8
8 +
t
A
CLKOUT cycle time
CLKOUT high time
CLKOUT low time
CLKOUT rise time
CLKOUT fall time
CLKOUT rising edge to
ALE falling edge
Synchronous READY
setup time to CLKOUT
Synchronous READY
hold time after CLKOUT
Asynchronous READY
low time
Asynchronous READY
setup time
1)
Asynchronous READY
hold time
1)
Async. READY hold time
after RD, WR high
(Demultiplexed Bus)
2)
t
29
CC
t
30
CC
t
31
CC
t
32
CC
t
33
CC
t
34
CC
ns
ns
ns
ns
ns
ns
t
35
SR
18
18
ns
t
36
SR
4
4
ns
t
37
SR
68
2TCL +
t
58
ns
1)
These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
2)
Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This
adds even more time for deactivating READY.
The 2
t
A
and
t
C
refer to the next following bus cycle,
t
F
refers to the current bus cycle.
The maximum limit for
t
60
must be fulfilled if the next following bus cycle is READY controlled.
t
58
SR
18
18
ns
t
59
SR
4
4
ns
t
60
SR
0
0
+ 2
t
A
+
t
C
+
t
F2)
0
TCL – 25
+ 2
t
A
+
t
C
+
t
F2)
ns
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