參數(shù)資料
型號: SAF-C161O-LM 3V HA
廠商: Infineon Technologies
文件頁數(shù): 32/66頁
文件大?。?/td> 0K
描述: IC MCU 16BIT ROM/LESS MQFP-80-1
標(biāo)準(zhǔn)包裝: 1
系列: C16xx
核心處理器: C166
芯體尺寸: 16-位
速度: 20MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 63
程序存儲器類型: ROMless
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-QFP
包裝: 剪切帶 (CT)
產(chǎn)品目錄頁面: 736 (CN2011-ZH PDF)
其它名稱: SAF-C161O-LM3VHACT
SAF-C161O-LM3VHACT-ND
SAF-C161O-LM3VHAINCT
C161K
C161O
Data Sheet
34
V2.0, 2001-01
Power Consumption C161K/O (Standard Supply Voltage Range)
(Operating Conditions apply)
Parameter
Symbol
Limit Values
Unit Test Condition
min.
max.
Power supply current (active)
with all peripherals active
IDD5
15 +
1.8
× f
CPU
mA
RSTIN =
VIL
fCPU in [MHz]
1)
Idle mode supply current
with all peripherals active
IIDX5
2 +
0.4
× f
CPU
mA
RSTIN =
VIH1
fCPU in [MHz]
Power-down mode supply
current
IPDO5
50
A
VDD = VDDmax
2)
1) The supply current is a function of the operating frequency. This dependency is illustrated in Figure 7.
These parameters are tested at
VDDmax and maximum CPU clock with all outputs disconnected and all inputs
at
VIL or VIH.
2) This parameter is tested including leakage currents. All inputs (including pins configured as inputs) at 0 V to
0.1 V or at
VDD - 0.1 V to VDD, all outputs (including pins configured as outputs) disconnected.
Power Consumption C161K/O (Reduced Supply Voltage Range)
(Operating Conditions apply)
Parameter
Symbol
Limit Values
Unit Test Condition
min.
max.
Power supply current (active)
with all peripherals active
IDD3
3 +
1.3
× f
CPU
mA
RSTIN =
VIL
fCPU in [MHz]
1)
1) The supply current is a function of the operating frequency. This dependency is illustrated in Figure 7.
These parameters are tested at
VDDmax and maximum CPU clock with all outputs disconnected and all inputs
at
VIL or VIH.
Idle mode supply current
with all peripherals active
IIDX3
1 +
0.4
× f
CPU
mA
RSTIN =
VIH1
fCPU in [MHz]
Power-down mode supply
current
IPDO3
30
A
VDD = VDDmax
2)
2) This parameter is tested including leakage currents. All inputs (including pins configured as inputs) at 0 V to
0.1 V or at
VDD - 0.1 V to VDD, all outputs (including pins configured as outputs) disconnected.
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