
Philips Semiconductors
SAA8122A
Digital Still Camera Processor (ImagIC family)
Objective specification
Rev. 01 — 20 April 2000
2 of 26
9397 750 07048
Philips Electronics N.V. 2000. All rights reserved.
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Interface to ROM, DRAM, SRAM, flash and PC Card [Compact Flash and SSFDC
(SmartMedia)]
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Integrated general purpose peripheral units like a UART, timers, an I
2
C-bus
transceiver, ADC converters, RTC and I/O ports
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Includes USB and RS-232C communication interfaces.
2.2 External interfaces
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Two UART (RS-232) data ports with DMA capabilities (
≤
187.5 kbit/s) including
hardware flow control RxD, TxD, RTS, CTS for modem support
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32 general purpose, bidirectional I/O interface pins, the first 8 bits may also be
used as interrupt inputs
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Two PWM outputs (8-bit resolution).
2.3 CPU related features
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32-bit PR3001 core
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1-kbyte data cache and 4-kbyte instruction cache
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Programmable low-power mode, including wake-up on interrupt
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Memory management unit [Translation Lookaside Buffer (TLB)]
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Two built in 24-bit general purpose timers and one 24-bit watchdog timer
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Real-time clock unit (active in sleep mode)
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On-chip 8-kbyte SRAM for storing code which needs fast execution
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Platform software based on real-time pSOS (plug-in Silicon Operating System).
2.4 DSP features
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Advanced colour reconstruction
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Programmable digital filters for noise reduction and contour enhancement
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16 programmable measurement windows allowing to perform the measurements
necessary for exposure, white balance and focus adjustment in a DSC system;
available measurement outputs for exposure, white balance and focus control.
2.5 Pulse pattern generator features
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Programmable through dedicated PC-software, allowing to drive all CCDs
currently present in the market, as well as CDS/AGC/ADC chips: up to
8
×
8 kpixels.
2.6 JPEG
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Fully ISO10918 compliant
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Supports Tiff, Exif 2.1, DCF & DPOF
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Quick compression (4 images/s for a 1.3 Mpixels resolution).
2.7 USB interface
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Fully compatible with USB.