參數(shù)資料
型號: SAA7384
廠商: NXP Semiconductors N.V.
英文描述: Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
中文描述: 地面數(shù)字音頻解碼器為傳統(tǒng)載波鎖相環(huán)中頻系統(tǒng)
文件頁數(shù): 5/40頁
文件大小: 182K
代理商: SAA7384
1996 Oct 24
5
Philips Semiconductors
Preliminary specification
Terrestrial digital sound decoder for
conventional intercarrier PLL-IF systems
SAA7284
PINNING
SYMBOL
PIN
DESCRIPTION
SDIP52
QFP64
(1)
MUTE
1
57
active LOW mute input; function defined by MUTEDEF (control bit in the
I
2
C-bus register)
digital audio interface output that can be 3-stated via I
2
C-bus
analog supply voltage for the audio channels
analog ground connection for the audio channels
internal audio reference voltage buffer (high-impedance node)
external analog input to the right audio channel
FM sound input to the right audio channel
analog output from the right audio channel
not connected; left open-circuit in application
internal audio reference voltage buffer output
quiet ground connection to DACs
not connected; left open-circuit in application
analog output from the left audio channel
FM sound input to the left audio channel
external analog input to the left audio channel
active LOW power-on reset mute input; mute cleared by setting silence bit
HIGH in I
2
C-bus (internal pull-up)
power-on reset audio select input (internal pull-up)
carrier loop-filter connection
carrier loop-filter output
sine channel eye pattern output for monitoring
sine channel offset compensator capacitor output
demodulator ground connection 1
carrier loop VCO clock output for monitoring
demodulator supply voltage 1
carrier loop VCO control voltage input
mixer voltage reference or input when using differential DQPSK signal
DQPSK input signal
cosine channel offset compensator capacitor output
cosine channel eye pattern output for monitoring
AGC peak detector storage capacitor output
internal demodulator reference voltage buffered output
internal demodulator reference current output
internal demodulator reference voltage unbuffered output
demodulator supply voltage 2
demodulator ground connection 2
not connected; left open-circuit in application
clock loop-phase comparator output
DOBM
V
DDA
V
SSA
V
RCA
EXTR
FMR
OPR
n.c.
V
ROA
V
SSDAC
n.c.
OPL
FML
EXTL
PORM
2
3
4
5
6
7
8
59
61
62
63
2
3
4
9 and 10
11
12
13 and 14
15
16
17
18
9 and 10
7
8
11
12
13
14
PORA
REMVE
REMO
SEYE
SOFF
V
SSF1
VCLK
V
DDF1
VCONT
MIXREF
DQPSK
COFF
CEYE
PKDET
V
ROF
I
REF
V
RCF
V
DDF2
V
SSF2
n.c.
CLKLPF
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
15
16
17
21
22
23
24
25
27
28
29
30
31
34
35
36
37
38
39
40
41
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