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May 1994
7
Philips Semiconductors
Preliminary specification
Bitstream conversion ADC for
digital audio systems
SAA7366
During standby the following occurs:
The internal logic clock is disabled
The serial interface pins are forced to high impedance
The OVLD output is forced LOW
The analog circuitry is disabled
The nominal external analog node voltages are
maintained by a low-power circuit. This feature ensures
a fast recovery from standby mode.
On a LOW-to-HIGH transition the device reverts back to its
normal function. This process takes approximately 32
system clock cycles. Before SDO is enabled the output
data is forced LOW. SDO remains LOW until good data is
available from the decimation filter.
The STD pin has a Schmitt-trigger input. A simple
power-on reset function can be effected using an external
capacitor to V
SSD
and resistor to V
DDD
.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes
1.
2.
3.
V
SSD
and V
SSA
pins must be externally connected to a common potential.
Equivalent to discharging a 100 pF capacitor via a 1.5 k
series resistor with a rise time of 15 ns.
Equivalent to discharging a 200 pF capacitor via a 2.5
μ
H series inductor.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
CHARACTERISTICS
V
DDD
= 3.4 to 5.5 V; V
DDA
= 4.5 to 5.5 V; T
amb
=
40 to +85
°
C; f
s
= 18 to 53 kHz; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DDA
V
I
I
IK
V
O
I
O
I
DDtot
I
SStot
T
amb
T
stg
V
es1
V
es2
analog supply voltage
DC input voltage
DC input diode current
DC output voltage
DC output source or sink current
total DC supply current
total DC supply current
operating ambient temperature
storage temperature
electrostatic handling
electrostatic handling
note 1
0.5
0.5
0.5
40
65
2000
200
+6.5
+6.5
±
20
V
DD
+ 0.5
±
20
±
0.5
±
0.5
+85
+150
+2000
+200
V
V
mA
V
mA
A
A
°
C
°
C
V
V
note 2
note 3
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
V
DDA
I
DDA
V
DDD
I
DDD
P
tot
analog supply voltage
analog supply current
digital supply voltage
digital supply current
total power consumption
4.5
3.4
5.0
13
5.0
56
345
5.5
5.5
V
mA
V
mA
mW
f
s
= 48 kHz
f
s
= 48 kHz
f
s
= 48 kHz