參數(shù)資料
型號(hào)： SAA7284ZP
廠(chǎng)商： NXP SEMICONDUCTORS
元件分類(lèi)： 消費(fèi)家電
英文描述： Terrestrial digital sound decoder for conventional intercarrier PLL-IF systems
中文描述： SPECIALTY CONSUMER CIRCUIT, PDIP52
封裝： 0.600 INCH, PLASTIC, SOT-247-1, SDIP-52
文件頁(yè)數(shù)： 17/40頁(yè)
文件大小： 182K
代理商： SAA7284ZP
1996 Oct 24
17
Philips Semiconductors
Preliminary specification
Terrestrial digital sound decoder for
conventional intercarrier PLL-IF systems
SAA7284
OVW
This bit is set when new additional data bits are written to
the I
2
C-bus without the previous bits being read.
SAD
This bit is set HIGH when new additional data is written
into the I
2
C-bus, and cleared by the action of reading the
data.
CI1
AND
CI2
These are the CI bits decoded by majority logic from the
parity checks of the last ten samples in a frame.
AD10, AD9
AND
AD8
These are the three most significant additional data bits.
C1, C2
AND
C3
These are the transmitted control bits, see Table 13.
BG/I
When set HIGH this bit indicates that the DQPSK
demodulator is switched to system BGH. When LOW,
indicates that DQPSK demodulator is switched to
system I.
Indicator bits
Table 13 is the truth table for the indicator bits.
Table 13
Indicator bits functional truth table
TRANSMISSION
C1
C2
C3
S/M
D/S
VDSP
OS
Stereo
M1 + M2
M1 + data
Transparent data
Any currently undefined combination of C1, C2 and C3
Decoder unsynchronized (OS = logic 0)
0
0
1
1
0
1
0
1
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
1
1
1
0
0
0
1
1
1
1
1
0
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