參數(shù)資料
型號(hào)： SAA5547PS
廠商： NXP Semiconductors N.V.
英文描述： TV Microcontrollers with Closed Captioning (CC) and On-Screen Display (OSD)(帶關(guān)閉字幕和全屏顯示的TV控制器)
中文描述： 電視微控制器與隱藏字幕（CC）和屏幕顯示（OSD）（帶關(guān)閉字幕和全屏顯示的電視控制器）
文件頁(yè)數(shù)： 41/84頁(yè)
文件大小： 318K
代理商： SAA5547PS
2000 Feb 23
41
Philips Semiconductors
Preliminary specification
TV microcontrollers with Closed Captioning (CC)
and On-Screen Display (OSD)
SAA55xx
17 DATA CAPTURE
The Data Capture section takes in the analog Composite
Video and Blanking Signal (CVBS), and from this extracts
the required data, which is then decoded and stored in
memory.
The extraction of the data is performed in the digital
domain. The first stage is to convert the analog
CVBS signal into a digital form. This is done using an ADC
sampling at 12 MHz. The data and clock recovery is then
performed by a Multi-Rate Video Input Processor
(MulVIP). From the recovered data and clock, the serial
Closed Captioning data is converted to parallel and stored
as two bytes per line. The extracted data is stored in
SFR locations.
17.1
Data Capture features
Two CVBS inputs
Data Capture for Line 21 Data Service
Video Signal Quality Detector.
17.1.1
CVBS
SWITCH
The CVBS switch is used to select the required analog
input depending on the value of TXT8.CVBS1/CVBS0.
17.1.2
A
NALOG
-
TO
-D
IGITAL
C
ONVERTER
The output of the CVBS switch is passed to a differential
to single ended converter, although in this device it is used
in single ended configuration with a reference. The analog
output of the differential to single ended converter is
converted into a digital representation by a full-flash ADC
with a sampling rate of 12 MHz.
17.1.3
M
ULTI
-
RATE VIDEO INPUT PROCESSOR
The multi-rate video input processor is a Digital Signal
Processor designed to extract the data and recover the
clock from a digitized CVBS signal. The only data and
clock standard that can be recovered in the OSD only
devices is Closed Caption at a data rate of approximately
503.5 kHz.
17.1.4
D
ATA
C
APTURE TIMING
The Data Capture timing section uses the synchronisation
information extracted from the CVBS signal to generate
the required horizontal and vertical reference timings.
The timing section automatically recognizes and selects
the appropriate timings for either 625 (50 Hz)
synchronisation or 525 (60 Hz) synchronisation.
A flag TXT12.VIDEO SIGNAL QUALITY is set when the
timing section is locked correctly to the incoming CVBS
signal. When TXT12.VIDEO SIGNAL QUALITY is set
another flag TXT12.525/625 SYNC can be used to identify
the standard.
17.1.5
L
INE
21 D
ATA
S
ERVICES
The Line 21 Data Services is transmitted on line 21 of a
525-line broadcast system and is used for Captioning
information,TextinformationandExtendedDataServices.
Full Details can be found in “Recommended Practise for
Line 21 Data Service EIA-608”
Closed Caption Line 21 data is only acquired when
TXT21.CC ON bit is set.
Two bytes of data are stored per field in SFRs, the first bye
is stored in CCDAT1 and the second byte is stored in
CCDAT2. The contents of each CCDAT register are reset
to 00H at the start of the Closed Caption line defined by
CCLIN.CS<4:0>. At the end of the Closed Caption line an
interrupt is generated if IE.ECC is active.
The processing of the Closed Caption data to convert into
a displayable format is performed by software.
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參數(shù)描述
SAA5547PS/NNNN 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:TV microcontrollers with Closed Captioning (CC) and On-Screen Display (OSD)
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SAA5552TRI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic
SAA5553PS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Standard TV Microcontrollers with On-Screen Display(OSD)
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