參數(shù)資料
型號: SAA5542PS
廠商: NXP Semiconductors N.V.
英文描述: TV Microcontrollers with Closed Captioning (CC) and On-Screen Display (OSD)(帶關(guān)閉字幕和全屏顯示的TV控制器)
中文描述: 電視微控制器與隱藏字幕(CC)和屏幕顯示(OSD)(帶關(guān)閉字幕和全屏顯示的電視控制器)
文件頁數(shù): 9/84頁
文件大小: 318K
代理商: SAA5542PS
2000 Feb 23
9
Philips Semiconductors
Preliminary specification
TV microcontrollers with Closed Captioning (CC)
and On-Screen Display (OSD)
SAA55xx
COR
29
43
O
Open-drain, active LOW output which allows selective
contrast reduction of the TV picture to enhance a
mixed mode display.
+3.3 V analog power supply
Pixel rate output of the BLUE colour information.
Pixel rate output of the GREEN colour information.
Pixel rate output of the RED colour information.
Video/data switch push-pull output for dot rate fast
blanking.
Schmitt triggered input TTL version of the horizontal
sync pulse. The polarity of this pulse is programmable
by register bit TXT1.H POLARITY.
Schmitt triggered input for a TTL version of the vertical
sync pulse. The polarity of this pulse is programmable
by register bit TXT1.V POLARITY.
periphery ground
+3.3 V core power supply
crystal oscillator ground
12 MHz crystal oscillator input
12 MHz crystal oscillator output
If the reset input is HIGH for at least 2 machine cycles
(24 oscillator periods) while the oscillator is running,
the device is reset. This pin should be connected to
V
DDP
via a capacitor.
+3.3 V periphery power supply
Port 1.
8-bit programmable bidirectional port with
alternative functions.
V
DDA
B
G
R
VDS
31
32
33
34
35
45
46
47
48
52
O
O
O
O
HSYNC
36
53
I
VSYNC
37
55
I
V
SSP
V
DDC
OSCGND
XTALIN
XTALOUT
RESET
38
39
40
41
42
43
12, 60
63
69
70
71
73
I
O
I
V
DDP
P1.0/INT1
P1.1/T0
P1.2/INT0
P1.3/T1
P1.6/SCL0
P1.7/SDA0
P1.4/SCL1
P1.5/SDA1
44
45
46
47
48
49
50
51
52
75
76
78
79
80
81
82
83
84
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P1.0/INT1 is external interrupt 1 which can be
triggered on the rising and falling edge of the pulse.
P1.1/T0 is the Counter/Timer 0. P1.2/INT0 is external
interrupt 0. P1.3/T1 is the Counter/Timer 1.
P1.6/SCL0 is the serial clock input for the I
2
C-bus and
P1.7/SDA0 is the serial data port for the I
2
C-bus.
P1.4/SCL1 is the serial clock input for the I
2
C-bus and
P1.5/SDA1 is the serial data port for the I
2
C-bus.
OTP programming voltage
not connected
VPE_2
n.c.
62
I
3, 7 to 10, 14, 15,
19 to 21, 23, 26, 27, 33,
36 to 40, 49 to 51,
56 to 58, 61, 64 to 68,
72, 74, 77, 85 to 92, 99
SYMBOL
PIN
TYPE
DESCRIPTION
SDIP52
LQFP100
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