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參數資料
| 型號： | SAA2510 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Video CD VCD decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 X 2.70 MM, PLASTIC, QFP-100 |
| 文件頁數： | 12/28頁 |
| 文件大?。?/td> | 126K |
| 代理商： | SAA2510 |
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1996 May 21
12
Philips Semiconductors
Preliminary specification
Video CD (VCD) decoder
SAA2510
Sub-address byte format
MSB
A7
LSB
A0
MSB
C1
LSB
A8
A6
A5
A4
A3
A2
A1
C0
A13
A12
A11
A10
A9
When A0 is a ‘1’, the address byte is not acknowledged
(odd address).
Explanation of control bits
C0 = 0; 2-byte sub-address.
C0 = 1; 3-byte sub-address. The next byte transmitted is
also an address byte:
3-byte sub-address - most significant byte format
C1 = 0; sub-address post increment enabled. After each
transfer of 2 bytes, the address is automatically
incremented by 2.
C1 = 1; sub-address post increment disabled.
The master will terminate a read action by NOT
acknowledging the last read byte followed by a STOP
condition.
MSB
0
LSB
A14
0
0
A18
A17
A16
A15
I
2
C-bus transaction summary
The following notation is used to describe bus
transactions:
S: START condition generated by bus master
P: STOP condition generated by bus master
A: Acknowledge bit generated by master or slave
according to transaction type and stage
N: Negative acknowledge; acknowledge bit is not set by
bus master during last byte of a read
SLA: 7-bit slave address generated by bus master
W: R/W bit after slave address is set to write
R: R/W bit after slave address is set to read
SUB_N: Sub-address byte N (N = 0, 1 or 2); least
significant address byte is SUB_0
D(M): A data byte transmitted by master or slave on the
bus; D(0) is the first byte sent; as all transfers must be
an even number of bytes, it follows that M must be odd.
Set 2-byte sub-address and write (M + 1) bytes
Set 2-byte sub-address and read (M + 1) bytes
Set 3-byte sub-address and write (M + 1) bytes
Set 3-byte sub-address and read (M + 1) bytes
This addressing mode is valid only if sub-address auto incrementing is disabled. It is intended for fast polling of a status
register.
S
SLA
W
A
SUB_0
A
SUB_1
A
D(0)
A
D(1)
A to D(M)
A
P
S
SLA
W
A
SUB_0 A
SUB_1 A
S
SLA
R
D(0)
A
D(1)
A to D(M)
N
P
S
SLA
W
A
SUB_0 A
SUB_1 A
SUB_2
A
D(0) A
D(1)
A to D(M)
A
P
S SLA
W
A
SUB_0 A
SUB_1 A
SUB_2
A
S
SLA
R
A D(0)
A
D(1)
A to D(M)
N
P
相關PDF資料 |
PDF描述 |
|---|---|
| SAA2520GP | Stereo filter and codec for MPEG layer 1 audio applications |
| SAA2520 | Stereo filter and codec for MPEG layer 1 audio applications |
| SAA3004 | Remote control transmitter |
| SAA3004P | Remote control transmitter |
| SAA3004T | Remote control transmitter |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SAA2511DEB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| SAA2520 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Stereo filter and codec for MPEG layer 1 audio applications |
| SAA2520GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Stereo filter and codec for MPEG layer 1 audio applications |
| SAA2521 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Masking threshold processor for MPEG layer 1 audio compression applications |
| SAA2521GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Masking threshold processor for MPEG layer 1 audio compression applications |
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