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參數(shù)資料
| 型號： | SA9110A |
| 廠商： | SAMES |
| 元件分類： | 電能質(zhì)量分析儀 |
| 英文描述： | MONOCHIP THREE PHASE BIDIRECTIONAL |
| 中文描述： | MONOCHIP三相雙向 |
| 文件頁數(shù)： | 11/18頁 |
| 文件大?。?/td> | 183K |
| 代理商： | SA9110A |
SA9110A
sames
11/18
Word
number number
5
Bit
Function
Description
27..0
Register 'Total'
Registers 1, 2, 3 and 4 are added and stored in the
register 'Total'
Don't care
16 bits are available for the manufacturer of the
metering system as a system identification
Don't care
28 bits are available for the manufacturer of the
metering system as a system identification
Don't care
Programmed slope select bit must be set if the
default slope in ROM is not used
Don't care
Bits must be set to 0 for correct functionality
6
6
31..16
15..0
ROM
Manufacturers
Identification
ROM
System
Identification
ROM
Programmed slope
select
ROM
SAMES defined
register
Sign of offset
Offset
Sign of slope
Slope
ROM
7
7
31..28
27..0
8
9
31..0
31
9
9
30..25
24-22
9
9
9
9
21
By setting the sign bit a negative value is indicated
Offset of the device in binary
By setting the sign bit a negative value is indicated
Slope of the device in binary. (default = 11389)
Don't care
20..14
13
12..0
31..0
10
The first bit of the programming data is written to word number 1, bit 31. The last
bit is written to word number 10, bit 0.
Programming procedure:
The PGM pin is pulled low and the PCLK pin should be clocked with an external
clock. The programming data on the PDTA pin must be stable during the rising edge
of the clock signal on PCLK.
The clock signal on PCLK should not exceed 200 kHz and does not have to be
synchronised with the oscillator frequency (FOSC).
Programming mode is interrupted if PGM goes high.
PDTA
BIT-N0
WORD-NO
DR-00957
29
1
31
1
30
1
1
28
1
27
PCLK
PGM
0
10
24
1
1
1
26
25
23
1
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