參數(shù)資料
型號: SA571DR2
廠商: ON Semiconductor
文件頁數(shù): 9/11頁
文件大?。?/td> 0K
描述: IC COMPANDOR DUAL GAIN 16-SOIC
產(chǎn)品變化通告: Product Obsolescence 11/Feb/2009
標準包裝: 1,000
類型: 壓縮擴展器
應用: 蜂窩式無線電,播放器
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 16-SOIC W
包裝: 帶卷 (TR)
SA571
http://onsemi.com
7
Figure 9 shows the rectifier circuit in more detail. The op
amp is a onestage op amp, biased so that only one output
device is on at a time. The noninverting input, (the base of
Q1), which is shown grounded, is actually tied to the internal
1.8 V, VREF. The inverting input is tied to the op amp output,
(the emitters of Q5 and Q6), and the input summing resistor
R1. The single diode between the bases of Q5 and Q6 assures
that only one device is on at a time. To detect the output
current of the op amp, we simply use the collector currents
of the output devices Q5 and Q6. Q6 will conduct when the
input swings positive and Q5 conducts when the input
swings negative. The collector currents will be in error by
the
a of Q5 or Q6 on negative or positive signal swings,
respectively. ICs such as this have typical NPN
b’s of 200
and PNP
b’s of 40. The a’s of 0.995 and 0.975 will produce
errors of 0.5% on negative swings and 2.5% on positive
swings. The 1.5% average of these errors yields a mere 0.13
dB gain error.
V+
Q1 Q2
Q3
Q4
Q7
Q5
Q6
Q8
Q9
CR
D1
I1
I2
VIN
V
I
G + 2
V
IN avg
R1
NOTE:
Figure 9. Simplified Rectifier Schematic
R1
10k
W
RS
10k
W
At very low input signal levels the bias current of Q2,
(typically 50 nA), will become significant as it must be
supplied by Q5. Another low level error can be caused by DC
coupling into the rectifier. If an offset voltage exists between
the VIN input pin and the base of Q2, an error current of
VOS/R1 will be generated. A mere 1.0 mV of offset will
cause an input current of 100 nA which will produce twice
the error of the input bias current. For highest accuracy, the
rectifier should be coupled capacitively. At high input levels
the
b of the PNP Q6 will begin to suffer, and there will be an
increasing error until the circuit saturates. Saturation can be
avoided by limiting the current into the rectifier input to
250
mA. If necessary, an external resistor may be placed in
series with R1 to limit the current to this value. Figure 10
shows the rectifier accuracy vs. input level at a frequency of
1.0 kHz.
ERROR
GAIN
dB
+1
0
1
40
20
0
RECTIFIER INPUT dBm
Figure 10. Rectifier Accuracy
At very high frequencies, the response of the rectifier will
fall off. The rolloff will be more pronounced at lower input
levels due to the increasing amount of gain required to
switch between Q5 or Q6 conducting. The rectifier
frequency response for input levels of 0 dBm, 20 dBm, and
40 dBm is shown in Figure 11. The response at all three
levels is flat to well above the audio range.
0
3
10k
1MEG
INPUT = 0dBm
20dBm
40dBm
FREQUENCY (Hz)
GAIN
ERROR
(dB)
Figure 11. Rectifier Frequency Response vs.
Input Level
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