參數(shù)資料
型號(hào)： SA25F020LEM8FX
廠商： Electronic Theatre Controls, Inc.
元件分類(lèi)： DRAM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 4兆位統(tǒng)一部門(mén)，串行閃存
文件頁(yè)數(shù)： 25/37頁(yè)
文件大?。?/td> 560K
代理商： SA25F020LEM8FX
SA25F020 Advanced Information
SAIFUN
25
Page Programming (PP)
The PP instruction allows bytes to be
programmed in the memory (changing bits
from 1 to 0). In order to program to the
SA25F020, two separate instructions must
be executed. The device must first be write
enabled via the WREN instruction, and
then a PP sequence (which consists of four
bytes plus data) may be executed. The
address of the memory locations to be
written must be outside the protected
address field location selected by the Block
Write Protection level. During an internal
Program cycle, all commands are ignored
except the RDSR instruction.
A PP instruction requires the following
sequence:
=
After the CSb line is pulled low to
select the device, the PP opcode is
transmitted via the SI line, followed
by the byte address and the data
(D7-D0) to be written.
Programming starts after the CSb pin is
brought high. The CSb pin's low-to-high
transition must occur during the SCK low
time, immediately after the clock in the D0
(LSB) data bit. The instruction sequence is
shown in Figure 16, page 26.
As soon as CSb is driven high, the
self-timed PP cycle (whose duration is
defined as T
PP
) is initiated. While the Page
Program cycle is in progress, the status
register may be read to check the value of
the Write in Progress (/RDY) bit. The /RDY
bit is 1 during the self-timed Page Program
cycle, and 0 when it is completed. The
Write Enable Latch (WEN) bit is reset at
some unspecified time before the cycle is
completed.
The SA25F020's PP operation is capable
of up to a 256-byte programming, from 1 to
256 bytes at a time (changing bits from 1 to
0), provided that they lie in consecutive
addresses on the same page of memory.
After each byte is received, the eight
low-order address bits are internally
incremented by one. If more than 256
bytes of data are transmitted, the address
counter rolls over and the previously
written data is overwritten. The SA25F020
is automatically returned to the write
disable state at the completion of a Write
cycle.
NOTES:
1. If the device is not write enabled,
the
device
ignores
instruction and returns to the
standby state when CSb is brought
high. A new CSb falling edge is
required to re-initiate the serial
communication.
2. A PP instruction applied to a page
that is protected by the Block
Protect
(BP1,
described in Table 8, page 18, and
Table 9, page 21) is not executed.
the
PP
BP0)
bits
(as
相關(guān)PDF資料
PDF描述
SA25F020LENF 4 Mbit Uniform Sector, Serial Flash Memory
SA25F020 4 Mbit Uniform Sector, Serial Flash Memory
SA25F020E 4 Mbit Uniform Sector, Serial Flash Memory
SA25F020LEM8 RES 69.8 OHM 1/10W .5% 0805 SMD
SA25F020LEM8F 4 Mbit Uniform Sector, Serial Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SA25F020LEMLF 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:2Mb Serial Flash with 25MHz SPI Bus Interface
SA25F020LEMLFF 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:2Mb Serial Flash with 25MHz SPI Bus Interface
SA25F020LEMLFFX 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:2Mb Serial Flash with 25MHz SPI Bus Interface
SA25F020LEN 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:2Mb Serial Flash with 25MHz SPI Bus Interface
SA25F020LENF 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:2Mb Serial Flash with 25MHz SPI Bus Interface
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