
Appendix E Detailed Register Map
MC9S12XHZ512 Data Sheet, Rev. 1.06
Freescale Semiconductor
943
0x000E–0x000F External Bus Interface (S12XEBI) Map
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x000E
EBICTL0
R
ITHRS
0
HDBE
ASIZ4
ASIZ3
ASIZ2
ASIZ1
ASIZ0
W
0x000F
EBICTL1
R
EWAITE
0000
EXSTR2
EXSTR1
EXSTR0
W
0x0010–0x0017 Module Mapping Control (S12XMMC) Map 2 of 4
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x0010
GPAGE
R0
GP6
GP5
GP4
GP3
GP2
GP1
GP0
W
0x0011
DIRECT
R
DP15
DP14
DP13
DP12
DP11
DP10
DP9
DP8
W
0x0012
Reserved
R
0
0000000
W
0x0013
MMCCTL1
R
0
0000
EROMON
ROMHM
ROMON
W
0x0014
Reserved
R
0
0000000
W
0x0015
Reserved
R
0
0000000
W
0x0016
RPAGE
R
RP7
RP6
RP5
RP4
RP3
RP2
RP1
RP0
W
0x0017
EPAGE
R
EP7
EP6
EP5
EP4
EP3
EP2
EP1
EP0
W
0x0018–0x001B Miscellaneous Peripheral
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x0018
Reserved
R
0
0000000
W
0x0019
Reserved
R
0
0000000
W
0x001A
PARTIDH
R
1
1100100
W
0x001B
PARTIDL
R
0
0000000
W
0x001C–0x001F Port Integration Module (PIM) Map 3 of 5
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x001C
ECLKCTL
R
NECLK
NCLKX2
0000
EDIV1
EDIV0
W