參數(shù)資料
型號: S80C52EXXX-16R
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 72/134頁
文件大小: 3805K
代理商: S80C52EXXX-16R
42
8068U–AVR–06/2013
XMEGA A3
Not recommended for new designs -
Use XMEGA A3U series
Figure 25-1.
ADC overview
Each ADC has four MUX selection registers with a corresponding result register. This means
that four channels can be sampled within 1.5 s without any intervention by the application other
than starting the conversion. The results will be available in the result registers.
The ADC may be configured for 8- or 12-bit result, reducing the minimum conversion time (prop-
agation delay) from 3.5 s for 12-bit to 2.5 s for 8-bit result.
ADC conversion results are provided left- or right adjusted with optional ‘1’ or ‘0’ padding. This
eases calculation when the result is represented as a signed integer (signed 16-bit number).
PORTA and PORTB each has one ADC. Notation of these peripherals are ADCA and ADCB,
respectively.
ADC
Channel A
Register
Channel B
Register
Channel C
Register
Channel D
Register
Pin
in
puts
Pin
i
npu
ts
1-64 X
Internal
i
npu
ts
Channel A MUX selection
Channel B MUX selection
Channel C MUX selection
Channel D MUX selection
Event
Trigger
Configuration
Reference selection
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