參數(shù)資料
型號: S80C196MD
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 16 MHz, MICROCONTROLLER, PQFP80
封裝: EIAJ, SHRINK, QFP-80
文件頁數(shù): 7/25頁
文件大?。?/td> 1306K
代理商: S80C196MD
8XC196MD
AC ELECTRICAL CHARACTERISTICS (Continued)
Test Conditions Capacitive load on all pins e 100 pF Rise and fall times e 10 ns FOSC e 16 MHz
The 87C196MD will meet the following timing specifications
Symbol
Parameter
Min
Max
Units
Notes
TXHCH
XTAL1 to CLKOUT High or Low
30
110
ns
TCLCL
CLKOUT Cycle Time
2 TOSC
ns
TCHCL
CLKOUT High Period
TOSC b 10
TOSC a 15
ns
TCLLH
CLKOUT Falling Edge to ALE Rising
b
515
ns
TLLCH
ALE Falling Edge to CLKOUT Rising
b
20
15
ns
TLHLH
ALE Cycle Time
4 TOSC
ns
3
TLHLL
ALE High Period
TOSC b 10
TOSC a 10
ns
TAVLL
Address Setup to ALE Falling Edge
TOSC b 15
ns
TLLAX
Address Hold after ALE Falling
TOSC b 40
ns
TLLRL
ALE Falling Edge to RD Falling
TOSC b 30
ns
TRLCL
RD Low to CLKOUT Falling Edge
4
30
ns
TRLRH
RD Low Period
TOSC b 5TOSC a 25
ns
3
TRHLH
RD Rising Edge to ALE Rising Edge
TOSC
TOSC a 25
ns
1
TRLAZ
RD Low to Address Float
5
ns
TLLWL
ALE Falling Edge to WR Falling
TOSC b 10
ns
TCLWL
CLKOUT Low to WR Falling Edge
0
25
ns
TQVWH
Data Stable to WR Rising Edge
TOSC b 23
ns
TCHWH
CLKOUT High to WR Rising Edge
b
10
15
ns
TWLWH
WR Low Period
TOSC b 30
ns
3
TWHQX
Data Hold after WR Rising Edge
TOSC b 25
ns
TWHLH
WR Rising Edge to ALE Rising Edge
TOSC b 10
TOSC a 15
ns
1
TWHBX
BHE INST Hold after WR Rising
TOSC b 10
ns
TWHAX
AD8 – 15 Hold after WR Rising
TOSC b 30
ns
2
TRHBX
BHE INST Hold after RD Rising
TOSC b 10
ns
TRHAX
AD8 – 15 Hold after RD Rising
TOSC b 30
ns
2
NOTES
1 Assuming back to back cycles
2 8-bit bus only
3 If wait states are used add 2 TOSC N where N e number of wait states
15
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