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參數(shù)資料
| 型號： | S71GL064A08BFW0B0 |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲器 |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA56 |
| 封裝： | 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56 |
| 文件頁數(shù)： | 48/102頁 |
| 文件大?。?/td> | 1606K |
| 代理商： | S71GL064A08BFW0B0 |
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48
S71GL032A Based MCPs
S71GL032A_00_A0 March 31, 2005
A d v a n c e I n f o r m a t i o n
bit programming, a modified programming method is required; please contact
your local Spansion representative.
Any bit in a w rite buffer address range
cannot be programmed from “ 0” back to a “ 1.”
Attempting to do so may
cause the device to set DQ5= 1, of cause the DQ7 and DQ6 status bits to indicate
the operation was successful. However, a succeeding read will show that the data
is still “0.” Only erase operations can convert a “0” to a “1.”
Accelerated Program
The device offers accelerated program operations through the WP#/ACC or ACC
pin depending on the particular product. When the system asserts V
HH
on the
WP#/ACC or ACC pin. The device uses the higher voltage on the WP#/ACC or ACC
pin to accelerate the operation.
Note that the
WP#/
ACC pin must not be at V
HH
for operations other than accelerated programming, or device damage may re-
sult. WP# has an internal pullup; when unconnected, WP# is at V
IH
.
Figure 3
illustrates the algorithm for the program operation. Refer to the Erase
and Program Operations–
“AC Characteristics” section on page 67
section for pa-
rameters, and
Figure 14
for timing diagrams.
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相關(guān)代理商/技術(shù)參數(shù) |
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| S71GL064A08BFW0B2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
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| S71GL064A08BFW0F0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71GL064A08BFW0F2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71GL064A08BFW0F3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
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