參數(shù)資料
型號(hào)： S71GL064A08BAI0B3
廠商： SPANSION LLC
元件分類： 存儲(chǔ)器
英文描述： Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA56
封裝： 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56
文件頁(yè)數(shù)： 81/134頁(yè)
文件大小： 2383K
代理商： S71GL064A08BAI0B3
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48
S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
Advance
Info rmation
Figure 5. Program Suspend/Program Resume
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writ-
ing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are
then followed by the chip erase command, which in turn invokes the Embedded Erase algo-
rithm. The device does not require the system to preprogram prior to erase. The Embedded
Erase algorithm automatically preprograms and verifies the entire memory for an all zero data
pattern prior to electrical erase. The system is not required to provide any controls or timings
during these operations. Table 10 shows the address and data requirements for the chip erase
command sequence.
When the Embedded Erase algorithm is complete, the device returns to the read mode and
addresses are no longer latched. The system can determine the status of the erase operation
by using DQ7, DQ6, or DQ2. Refer to the Write Operation Status section for information on
these status bits.
Any commands written during the chip erase operation are ignored. However, note that a
hardware reset immediately terminates the erase operation. If that occurs, the chip erase
command sequence should be reinitiated once the device has returned to reading array data,
to ensure data integrity.
Figure 6 illustrates the algorithm for the erase operation. Refer to the Erase and Program Op-
erations table in the AC Characteristics section for parameters, and Figure 18 section for
timing diagrams.
Program Operation
or Write-to-Buffer
Sequence in Progress
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
Read data as
required
Done
reading?
No
Yes
Write address/data
XXXh/30h
Device reverts to
operation prior to
Program Suspend
Write address/data
XXXh/B0h
Wait 15
s
相關(guān)PDF資料
PDF描述
S71GL064A08BAI0F3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BAW0B3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BAW0F3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0B2 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0B3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S71GL064A08BAI0F0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BAI0F2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BAI0F3 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BAW0B0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BAW0B2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
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