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參數(shù)資料
| 型號(hào)： | S6C1652 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 6 BIT 300 / 309 CHANNEL TFT-LCD SOURCE DRIVER |
| 中文描述： | 6位三百〇九分之三百通道TFT - LCD的源驅(qū)動(dòng) |
| 文件頁(yè)數(shù)： | 7/19頁(yè) |
| 文件大?。?/td> | 198K |
| 代理商： | S6C1652 |
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6 BIT 300 / 309 CHANNEL TFT-LCD SOURCE DRIVER
S6C1652
7
PIN DESCRIPTIONS
Symbol
VDD1
VDD2
VSS1
VSS2
Y1 - Y309
D0<0:5>
- D2<0:5>
Pin Name
Logic power supply
Driver power supply
Logic ground
Driver ground
Driver outputs
Description
2.7 - 3.6 V
6.4 - 13.0 V
Ground (0 V)
Ground (0 V)
The D/A converted 64 gray-scale analog voltage is output.
The display data is input with a width of 18 bits,
gray-scale data (6 bits) by 3 dots (R,G,B) DX0: LSB, DX5: MSB
This pin controls the direction of shift register in cascade connection.
The shift direction of the shift registers is as follows.
SHL = H: DIO1 input, Y1
→
Y309, DIO2 output
SHL = L: DIO2 input, Y309
→
Y1, DIO1 output
SHL = H: Used as the start pulse input pin
SHL = L: Used as the start pulse output pin
SHL = H: Used as the start pulse output pin
SHL = L: Used as the start pulse input pin
POL = H: The reference voltage for odd number outputs are VGMA1 –
VGMA9 and those for even number outputs are VGMA10 – VGMA18
POL = L: The reference voltage for odd number outputs are VGMA10
– VGMA18 and those for even number outputs are VGMA1 – VGMA9
Refer to the shift register's shift clock input. The display data is loaded
to the data register at the rising edge of CLK2.
Latches the contents of the data register at rising edge and transfers
them to the D/A converter. Also, after CLK1 input, clears the internal
shift register contents. After 1 pulse input on start, operates normally.
CLK1 input timing refers to the "Relationships between CLK1 start
pulse (DIO1, DIO2) and blanking period" of the switching characteristic
waveform. Outputs the gray-scale data at rising edge.
Input the gamma corrected power supplies from external source.
VDD2 > VGMA1 > VGMA2 >
………
> VGMA17 > VGMA18 > VSS2
Keep gray-scale power supply unchanged during the gray-scale
voltage output.
SELT = H: 300 Output (Y151 - Y159 are disabled)
SELT = L: 309 Output
TESTB = H: Normal operation mode
TESTB = L: Test mode (OP AMP CUT-OFF, Rpu = 30k
)
Display data input
SHL
Shift direction control input
DIO1
Start pulse input / output
DIO2
Start pulse input / output
POL
Polarity input
CLK2
Shift clock input
CLK1
Latch input
VGMA1
–
VGMA18
Gamma corrected power
supplies
SELT
Output selection input
TESTB
Test input
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