參數(shù)資料
型號(hào): S6B33B0A
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: CONNECTOR ACCESSORY
中文描述: 連接器附件
文件頁(yè)數(shù): 19/76頁(yè)
文件大?。?/td> 423K
代理商: S6B33B0A
S6B33B0A PRELIMINARY VER 1.1 144 RGB SEGMENT & 177 COMMON DRIVER FOR 65,536 COLOR STN LCD
15
FUNCTIONAL DESCRIPTION
MPU INTERFACE
Chip Select Input
There are CS1B and CS2 pins for chip selection. The S6B33B0A can interface with an MPU only when CS1B is “L”
and CS2 is “H”. When these pins are set to any other combination, D/I, RDB, and WRB inputs are disabled and DB0
to DB15 are to be high impedance. And, in case of serial interface, the internal shift register and the counter are
reset.
Parallel/Serial Interface
The S6B33B0A has four types of interface with an MPU, which are two serial and two parallel interfaces. This
parallel or serial interface is determined by PS pin as shown in Table9.
Table 9. Parallel / Serial Interface Mode.
PS
MPU[1]
CS1B
CS2
MPU bus type
L
8080-Series MPU
H
H
CS1B
CS2
6800-Series MPU
L
3–Pin SPI
L
H
CS1B
CS2
4-Pin SPI
Parallel Interface (PS=”H”)
The 8-bit/16-bit bi-directional data bus is used in parallel interface. The type of MPU is selected by MPU[1] and the
mode of data-bus is controlled by MPU[0] as shown in below. In accessing internal registers (D/I = “ L” ), only DB[7:0]
are valid.
Table 10. Microprocessor Selection for Parallel Interface
MPU[1]
MPU[0]
CS1B
CS2
RDB
WRB
Data Bus
MPU bus type
L
DB[7:0]
L
H
CS1B
CS2
RDB
WRB
DB[15:0]
8080-series MPU
L
DB[7:0]
H
H
CS1B
CS2
E
R/W
DB[15:0]
6800-series MPU
Table 11. Parallel Data Transfer
6800-series
8080-series
D/I
RDB
WRB
RDB
WRB
Description
H
H
H
L
H
Read display data
H
H
L
H
L
Write display data
L
H
H
L
H
Read out internal status register
L
H
L
H
L
Write instruction data
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