參數(shù)資料
型號(hào)： S6A0071
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 32COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
中文描述： 32COM/60SEG驅(qū)動(dòng)
文件頁(yè)數(shù)： 15/29頁(yè)
文件大?。?/td> 330K
代理商： S6A0071
32COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0071
15
8) Set DDRAM Address
RS
0
R/W
0
DB7
1
DB6
AC6
DB5
AC5
DB4
AC4
DB3
AC3
DB2
AC2
DB1
AC1
DB0
AC0
Set DDRAM address to AC. This instruction makes DDRAM data available from MPU. When 1-line display mode
(N = 0), DDRAM address is from "00H" to "4FH". In 2-line display mode (N = 1), DDRAM address in the 1st line is
from "00H" to "27H", and DDRAM address in the 2nd line is from "40H" to "67H".
9) Read Busy Flag & Address
RS
0
R/W
1
DB7
BF
DB6
AC6
DB5
AC5
DB4
AC4
DB3
AC3
DB2
AC2
DB1
AC1
DB0
AC0
This instruction shows whether S6A0071 is in internal operation or not. If the resultant BF is "1", it means the
internal operation is in progress and you have to wait until BF to be Low, and then the next instruction can be
performed. In this instruction you can read also the value of address counter.
10) Write data to RAM
RS
1
R/W
0
DB7
D7
DB6
D6
DB5
D5
DB4
D4
DB3
D3
DB2
D2
DB1
D1
DB0
D0
Write binary 8-bit data to DDRAM/CGRAM. The selection of RAM from DDRAM, and CGRAM, is set by the
previous address set instruction: (DDRAM address set, CGRAM address set). RAM set instruction can also
determine the AC direction to RAM. After write operation, the address is automatically increased/decreased by 1,
according to the entry mode.
11) Read data from RAM
RS
1
R/W
1
DB7
D7
DB6
D6
DB5
D5
DB4
D4
DB3
D3
DB2
D2
DB1
D1
DB0
D0
Read binary 8-bit data from DDRAM/CGRAM. The selection of RAM is set by the previous address set
instruction. If the address set instruction of RAM is not performed before this instruction, the data that is read first
is invalid, because the direction of AC is not determined. If you read RAM data several times without RAM
address set instruction before read operation, you can get correct RAM data from the second, but the first data
would be incorrect, because there is no time margin to transfer RAM data. In case of DDRAM read operation,
cursor shift instruction plays the same role as DDRAM address set instruction; it also transfer RAM data to output
data register. After read operation address counter is automatically increased/decreased by 1 according to the
entry mode. After CGRAM read operation, display shift may not be executed correctly.
NOTE:
In case of RAM write operation, AC is increased/decreased by 1 like read operation. In this time,
AC indicates the next address position, but you can read only the previous data by read instruction.
相關(guān)PDF資料
PDF描述
S6A0072 16COM/40SEG DOT MATRIX LCD CONTROLLER & DRIVER
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S6A0072 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16COM/40SEG DOT MATRIX LCD CONTROLLER & DRIVER
S6A0073 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:40 CH SEGMENT/COMMON DRIVER FOR DOT MATRIX LCD
S6A0074 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0075 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:100 SEG / 34 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0078 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:120 SEG / 34 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
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