
S6A0031 PRELIMINARY SPEC. VER. 0.5
8 COM / 80 SEG DRIVER & CONTROLLER FOR STN LCD
14
INSTRUCTION DESCRIPTION
Table 9. Instruction Table
Instruction
RS R/W
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Description
*Clear display
0
0
0
0
0
0
0
0
0
1
Write "20H" to DDRAM and set DDRAM
address to "00H" from AC
DDRAM address is set to 00h from AC and
the cursor returns to 00h position. The
contents of DDRAM are not changed.
Return home
0
0
0
0
0
0
0
0
1
-
Entry mode set
0
0
0
0
0
0
0
1
I/D SH
Assign cursor moving direction and enable
the shift of entire display
Display ON / OFF
control
0
0
0
0
0
0
1
D
C
B
Set display (D), cursor (C), and blinking of
cursor (B) ON / OFF control
Cursor or display
shift
0
0
0
0
0
1
S/C R/L
-
-
Set cursor moving and display shift control
bit, and the direction, without changing of
DDRAM data
Set interface data length (DL: 4-bit / 8-bit)
instruction
Function set
0
0
0
0
1
DL
-
-
-
-
CGRAM
address set
DDRAM
address set
0
0
0
1
0
0
A3
A2
A1
A0
Set CGRAM address in address counter.
0
0
1
0
0
A4
A3
A2
A1
A0
Set DDRAM address in address counter.
Read busy flag
and address
0
1
BF
-
-
A4
A3
A2
A1
A0
Whether in internal operation or not can be
known by reading BF, The contents of
address counter can also be read
Write data
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Write data into DDRAM / CGRAM
Read data
1
1
D7
D6
D5
D4
D3
D2
D1
D0
Read data from DDRAM / CGRAM
("-": Don’ care)
NOTES
1. Instruction execution time depends on the internal process time of S6A0031, therefore it is necessary to provide a time larger
than one MPU interface cycle time (tc) between execution of two successive instructions.
2. "Clear Display" instruction has 850
μ
s execution time (when fosc = 40.0kHz), so check the Busy flag or wait for more than
850
μ
s after using "Clear Display" instruction.