參數(shù)資料
型號(hào)： S5N8947X
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： MCU for ADSL/Cable Modem
中文描述： 單片機(jī)為ADSL / Cable Modem的
文件頁(yè)數(shù)： 23/49頁(yè)
文件大小： 407K
代理商： S5N8947X
ELECTRONICS
S5N8947 (ADSL/Cable Modem MCU)
SAMSUNG ELECTRONICS
Page : 23
MagIC Team
6.2. Instruction / Data Cache
The S5N8947 CPU has a unified internal 4-Kbyte instruction/data cache. The cache is configured
using two-way, set-associative addressing. The replacement algorithm is pseudo-LRU (Least Recently
Used). The cache line size is four words (16 bytes). When a miss occurs, four word must be fetched
consecutively from external memory. Typically, RISC processors take advantage of unified
instruction/data caches to improve performance.
switch
CS
Set 1 Tag
Set 0 Tag
15
2
Tag RAM (32-bit)
Set 1 Icache line = 4 instruction/data (128-bit)
Set 0 Icache line = 4 instruction/data (128-bit)
Decoder
6-bit
2-bit
Height = 128
7-bit
Height =
128
32
2
(Set 0 Hit)
(Set 1 Hit)
15
Enable non-cacheable control
100: Set 0 direct access
101: Set 1 direct access
110: TAG direct access
15
2
32
32
Instr3
Instr2
Instr1
Instr0
32-bit
Instr3
Instr2
Instr1
Instr0
32-bit
7-bit
31
27
28
Tag Address (15-bit)
25
0
30 29
26
10 9
4
3
2
1
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S5N8950 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:G.dmt ADSL Transceiver for CO and CPE
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