參數(shù)資料
型號(hào)： S5K437CX01
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 1/4 Optical Size 640x480 (VGA) 2.8V CMOS Image Sensor
中文描述： 1 / 4光學(xué)尺寸640 × 480（VGA）的2.8V的CMOS圖像傳感器
文件頁(yè)數(shù)： 28/36頁(yè)
文件大?。?/td> 285K
代理商： S5K437CX01
1/4 INCH VGA CMOS IMAGE SENSOR
S5K437CX
24
3-2. Bad Pixel Replacement
If the Bad Pixel Replacement Register (
bprm
) is disabled, the image sensor checks, with the preset threshold
value (
pthresh
), if the image data is less or greater than horizontally neighboring pixels in same color channel. If
satisfied, the output of the pixel is replaced by the averaged value of the neighboring two pixels. The detectable
defective pixels are rare and the bad pixel replacement action can remove the defective image effectively. But it
reduces the line resolution in the horizontal direction.
4. I
2
C Serial Interface
I
2
C is an industry standard serial interface. I
2
C contains a serial two-wire half duplex interface that features bi-
directional operation, master or slave mode. The general
SDA
and
SCL
are the bi-directional data and clock pins,
respectively. These pins are open-drain type ports and will require a pull-up resistor to VDD. The image sensor
operates in the salve mode only and the
SCL
is input only. I
2
C bus interface is composed of following parts :
START signal, 7-bit slave device address (0010001b) transmission followed by a read/write bit, an
acknowledgement signal from the slave, 8-bit data transfer followed by an acknowledgement signal and STOP
signal. The
SDA
bus line may only be changed while
SCL
is low. The data on the
SDA
bus line is valid on the
high-to-low transition of
SCL
.
SDA
start
D7
SCL
I
2
C Bus Address
I2C Register Address
Write
Ack
Ack
SDA
SCL
D7
Data to Write
Stop
Ack
"0"
"0"
"1"
"0"
"0"
"0"
"1"
D6
D5
D4
D3
D2
D1
D0
D6
D5
D4
D3
D2
D1
D0
Figure 10. I
2
C Bus Write Cycle
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