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參數(shù)資料
| 型號： | S3P8454-TW |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 25 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, TQFP-80 |
| 文件頁數(shù)： | 30/32頁 |
| 文件大?。?/td> | 206K |
| 代理商： | S3P8454-TW |
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S3C8454/P8454
PRODUCT OVERVIEW
1-7
Table 1-1. S3C8454/P8454 Pin Descriptions (Continued)
Pin
Name
Pin
Type
Pin
Description
Circuit
Type
QFP Pin
Number
Share
Pins
P5.0–P5.1
I/O
General I/O port with bit programmable pins.
Normal input or push-pull, output mode.
Alternately It can use as external interface
control signal P5.0/WAIT signal
5
7
WAIT
ADC0–ADC3
I
Analog input pins for A/D converter module.
Alternatively used as general-purpose I/O
2
49–46
P0.4–P0.7
AVREF
–
A/D converter reference voltage
AVSS is connected to ground internally
50
–
PWM0, PWM1
O
Pulse width modulation output pins
5
23,22
P3.6, P3.7
INT0–INT7
I
External interrupt input pins
4
37–30
P2.0–P2.7
TCCK, TDCK
I
External clock input for timer C and timer D
3
28,29
P3.1/P3.0
TCCAP,TDCAP
I
Timer C/ timer D capture input
3
26,27
P3.3/P3.2
WAIT
I
Input pin for the slow memory timing signal
from the external interface
5
7
P5.0
RESET
I
System reset pin (pull-up resistor: 240 k
)
1
19
–
EA
I
5V: ROMless operating
0V: internal 4 K and external 60 K
addressing mode
–
16
–
VDD1, VSS1
–
Power input pins for CPU operation (internal)
and Power input for OTP writing
–
12,13
–
VDD2, VSS2
–
Power input pins for port output (external)
–
53, 52
–
XIN, XOUT
–
Main oscillator pins
–
15, 14
–
SI, SO,
SCK
I/O
synchronous SIO communication port
3
40,39,38
P1.5/P1.6
P1.7
A0–A15
O
Address output for external device
6
65–80
–
D0–D7
I/O
Data I/O for external device
7
57–64
–
PM,DM
O
External memory selection output
–
1, 2
–
RD,WR
O
Memory read/write output
–
3, 4
–
CS0–CS3
O
Embedded chip selection output
5
11–8
P4.4–P4.7
TCOUT,TDOUT
O
16-bit timer PWM mode output
5
25, 24
P3.4, P3.5
VLD
–
Voltage Level Detect Pin
–
5
–
NOTE: VDD1 must be connected to VDD2 in users application circuit, VSS1 & VSS2 also.
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